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d26a566744
Add driver for the Qualcomm interconnect buses found in SM8350 based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pairs. Generated from downstream interconnect driver written by David Dai Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210318094617.951212-3-vkoul@kernel.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
168 lines
6 KiB
C
168 lines
6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Qualcomm SM8350 interconnect IDs
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*
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* Copyright (c) 2021, Linaro Limited
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*/
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#ifndef __DRIVERS_INTERCONNECT_QCOM_SM8350_H
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#define __DRIVERS_INTERCONNECT_QCOM_SM8350_H
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#define SM8350_MASTER_GPU_TCU 0
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#define SM8350_MASTER_SYS_TCU 1
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#define SM8350_MASTER_APPSS_PROC 2
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#define SM8350_MASTER_LLCC 3
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#define SM8350_MASTER_CNOC_LPASS_AG_NOC 4
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#define SM8350_MASTER_CDSP_NOC_CFG 5
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#define SM8350_MASTER_QDSS_BAM 6
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#define SM8350_MASTER_QSPI_0 7
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#define SM8350_MASTER_QUP_0 8
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#define SM8350_MASTER_QUP_1 9
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#define SM8350_MASTER_QUP_2 10
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#define SM8350_MASTER_A1NOC_CFG 11
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#define SM8350_MASTER_A2NOC_CFG 12
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#define SM8350_MASTER_A1NOC_SNOC 13
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#define SM8350_MASTER_A2NOC_SNOC 14
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#define SM8350_MASTER_CAMNOC_HF 15
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#define SM8350_MASTER_CAMNOC_ICP 16
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#define SM8350_MASTER_CAMNOC_SF 17
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#define SM8350_MASTER_COMPUTE_NOC 18
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#define SM8350_MASTER_CNOC_DC_NOC 19
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#define SM8350_MASTER_GEM_NOC_CFG 20
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#define SM8350_MASTER_GEM_NOC_CNOC 21
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#define SM8350_MASTER_GEM_NOC_PCIE_SNOC 22
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#define SM8350_MASTER_GFX3D 23
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#define SM8350_MASTER_CNOC_MNOC_CFG 24
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#define SM8350_MASTER_MNOC_HF_MEM_NOC 25
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#define SM8350_MASTER_MNOC_SF_MEM_NOC 26
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#define SM8350_MASTER_ANOC_PCIE_GEM_NOC 27
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#define SM8350_MASTER_SNOC_CFG 28
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#define SM8350_MASTER_SNOC_GC_MEM_NOC 29
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#define SM8350_MASTER_SNOC_SF_MEM_NOC 30
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#define SM8350_MASTER_VIDEO_P0 31
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#define SM8350_MASTER_VIDEO_P1 32
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#define SM8350_MASTER_VIDEO_PROC 33
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#define SM8350_MASTER_QUP_CORE_0 34
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#define SM8350_MASTER_QUP_CORE_1 35
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#define SM8350_MASTER_QUP_CORE_2 36
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#define SM8350_MASTER_CRYPTO 37
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#define SM8350_MASTER_IPA 38
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#define SM8350_MASTER_MDP0 39
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#define SM8350_MASTER_MDP1 40
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#define SM8350_MASTER_CDSP_PROC 41
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#define SM8350_MASTER_PIMEM 42
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#define SM8350_MASTER_ROTATOR 43
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#define SM8350_MASTER_GIC 44
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#define SM8350_MASTER_PCIE_0 45
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#define SM8350_MASTER_PCIE_1 46
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#define SM8350_MASTER_QDSS_DAP 47
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#define SM8350_MASTER_QDSS_ETR 48
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#define SM8350_MASTER_SDCC_2 49
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#define SM8350_MASTER_SDCC_4 50
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#define SM8350_MASTER_UFS_CARD 51
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#define SM8350_MASTER_UFS_MEM 52
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#define SM8350_MASTER_USB3_0 53
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#define SM8350_MASTER_USB3_1 54
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#define SM8350_SLAVE_EBI1 55
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#define SM8350_SLAVE_AHB2PHY_SOUTH 56
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#define SM8350_SLAVE_AHB2PHY_NORTH 57
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#define SM8350_SLAVE_AOSS 58
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#define SM8350_SLAVE_APPSS 59
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#define SM8350_SLAVE_CAMERA_CFG 60
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#define SM8350_SLAVE_CLK_CTL 61
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#define SM8350_SLAVE_CDSP_CFG 62
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#define SM8350_SLAVE_RBCPR_CX_CFG 63
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#define SM8350_SLAVE_RBCPR_MMCX_CFG 64
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#define SM8350_SLAVE_RBCPR_MX_CFG 65
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#define SM8350_SLAVE_CRYPTO_0_CFG 66
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#define SM8350_SLAVE_CX_RDPM 67
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#define SM8350_SLAVE_DCC_CFG 68
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#define SM8350_SLAVE_DISPLAY_CFG 69
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#define SM8350_SLAVE_GFX3D_CFG 70
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#define SM8350_SLAVE_HWKM 71
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#define SM8350_SLAVE_IMEM_CFG 72
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#define SM8350_SLAVE_IPA_CFG 73
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#define SM8350_SLAVE_IPC_ROUTER_CFG 74
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#define SM8350_SLAVE_LLCC_CFG 75
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#define SM8350_SLAVE_LPASS 76
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#define SM8350_SLAVE_LPASS_CORE_CFG 77
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#define SM8350_SLAVE_LPASS_LPI_CFG 78
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#define SM8350_SLAVE_LPASS_MPU_CFG 79
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#define SM8350_SLAVE_LPASS_TOP_CFG 80
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#define SM8350_SLAVE_MSS_PROC_MS_MPU_CFG 81
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#define SM8350_SLAVE_MCDMA_MS_MPU_CFG 82
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#define SM8350_SLAVE_CNOC_MSS 83
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#define SM8350_SLAVE_MX_RDPM 84
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#define SM8350_SLAVE_PCIE_0_CFG 85
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#define SM8350_SLAVE_PCIE_1_CFG 86
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#define SM8350_SLAVE_PDM 87
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#define SM8350_SLAVE_PIMEM_CFG 88
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#define SM8350_SLAVE_PKA_WRAPPER_CFG 89
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#define SM8350_SLAVE_PMU_WRAPPER_CFG 90
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#define SM8350_SLAVE_QDSS_CFG 91
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#define SM8350_SLAVE_QSPI_0 92
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#define SM8350_SLAVE_QUP_0 93
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#define SM8350_SLAVE_QUP_1 94
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#define SM8350_SLAVE_QUP_2 95
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#define SM8350_SLAVE_SDCC_2 96
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#define SM8350_SLAVE_SDCC_4 97
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#define SM8350_SLAVE_SECURITY 98
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#define SM8350_SLAVE_SPSS_CFG 99
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#define SM8350_SLAVE_TCSR 100
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#define SM8350_SLAVE_TLMM 101
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#define SM8350_SLAVE_UFS_CARD_CFG 102
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#define SM8350_SLAVE_UFS_MEM_CFG 103
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#define SM8350_SLAVE_USB3_0 104
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#define SM8350_SLAVE_USB3_1 105
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#define SM8350_SLAVE_VENUS_CFG 106
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#define SM8350_SLAVE_VSENSE_CTRL_CFG 107
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#define SM8350_SLAVE_A1NOC_CFG 108
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#define SM8350_SLAVE_A1NOC_SNOC 109
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#define SM8350_SLAVE_A2NOC_CFG 110
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#define SM8350_SLAVE_A2NOC_SNOC 111
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#define SM8350_SLAVE_DDRSS_CFG 112
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#define SM8350_SLAVE_GEM_NOC_CNOC 113
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#define SM8350_SLAVE_GEM_NOC_CFG 114
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#define SM8350_SLAVE_SNOC_GEM_NOC_GC 115
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#define SM8350_SLAVE_SNOC_GEM_NOC_SF 116
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#define SM8350_SLAVE_LLCC 117
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#define SM8350_SLAVE_MNOC_HF_MEM_NOC 118
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#define SM8350_SLAVE_MNOC_SF_MEM_NOC 119
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#define SM8350_SLAVE_CNOC_MNOC_CFG 120
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#define SM8350_SLAVE_CDSP_MEM_NOC 121
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#define SM8350_SLAVE_MEM_NOC_PCIE_SNOC 122
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#define SM8350_SLAVE_ANOC_PCIE_GEM_NOC 123
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#define SM8350_SLAVE_SNOC_CFG 124
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#define SM8350_SLAVE_QUP_CORE_0 125
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#define SM8350_SLAVE_QUP_CORE_1 126
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#define SM8350_SLAVE_QUP_CORE_2 127
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#define SM8350_SLAVE_BOOT_IMEM 128
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#define SM8350_SLAVE_IMEM 129
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#define SM8350_SLAVE_PIMEM 130
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#define SM8350_SLAVE_SERVICE_NSP_NOC 131
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#define SM8350_SLAVE_SERVICE_A1NOC 132
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#define SM8350_SLAVE_SERVICE_A2NOC 133
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#define SM8350_SLAVE_SERVICE_CNOC 134
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#define SM8350_SLAVE_SERVICE_GEM_NOC_1 135
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#define SM8350_SLAVE_SERVICE_MNOC 136
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#define SM8350_SLAVE_SERVICES_LPASS_AML_NOC 137
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#define SM8350_SLAVE_SERVICE_LPASS_AG_NOC 138
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#define SM8350_SLAVE_SERVICE_GEM_NOC_2 139
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#define SM8350_SLAVE_SERVICE_SNOC 140
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#define SM8350_SLAVE_SERVICE_GEM_NOC 141
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#define SM8350_SLAVE_PCIE_0 142
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#define SM8350_SLAVE_PCIE_1 143
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#define SM8350_SLAVE_QDSS_STM 144
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#define SM8350_SLAVE_TCU 145
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#define SM8350_MASTER_LLCC_DISP 146
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#define SM8350_MASTER_MNOC_HF_MEM_NOC_DISP 147
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#define SM8350_MASTER_MNOC_SF_MEM_NOC_DISP 148
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#define SM8350_MASTER_MDP0_DISP 149
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#define SM8350_MASTER_MDP1_DISP 150
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#define SM8350_MASTER_ROTATOR_DISP 151
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#define SM8350_SLAVE_EBI1_DISP 152
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#define SM8350_SLAVE_LLCC_DISP 153
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#define SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP 154
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#define SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP 155
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#endif
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