mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-30 08:02:30 +00:00
ea584595fc
cycle: - Increase the default ARCH_NR_GPIO from 256 to 512. This was done to avoid having a custom <asm/gpio.h> header for the x86 architecture - GPIO is custom and complicated enough as it is already! We want to move to a radix to store the descriptors going forward, and finally get rid of this fixed array size altogether. - Endgame patching of the gpio_remove() semantics initiated by Abdoulaye Berthe. It is not accepted by the system that the removal of a GPIO chip fails during e.g. reboot or shutdown, and therefore the return value has now painfully been refactored away. For special cases like GPIO expanders on a hot-pluggable bus like USB, we may later add some gpiochip_try_remove() call, but for the cases we have now, return values are moot. - Some incremental refactoring of the gpiolib core and ACPI GPIO library for more descriptor usage. - Refactor the chained IRQ handler set-up method to handle also threaded, nested interrupts and set up the parent IRQ correctly. Switch STMPE and TC3589x drivers to use this registration method. - Add a .irq_not_threaded flag to the struct gpio_chip, so that also GPIO expanders that block but are still not using threaded IRQ handlers. - New drivers for the ARM64 X-Gene SoC GPIO controller. - The syscon GPIO driver has been improved to handle the "DSP GPIO" found on the TI Keystone 2 SoC:s. - ADNP driver switched to use gpiolib irqchip helpers. - Refactor the DWAPB driver to support being instantiated from and MFD cell (platform device). - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP, Xilinx and Crystalcove drivers. - Various minor fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUNOr0AAoJEEEQszewGV1z9toP/2ISXRnsi3+jlqVmEGm/y6EA PPwJOiYnOhZR2/fTCHIF0PNbIi9pw7xKnzxttYCu4uCz7geHX+FfTwUZ2/KWMfqi ZJ9kEoOVVKzKjmL/m2a2tO4IRSBHqJ8dF3yvaNjS3AL7EDfG6F5STErQurdLEynK SeJZ2OwM/vRFCac6F7oDlqAUTu3xYGbVD8+zI0H0V/ReocosFlEwcbl2S8ctDWUd h98M+gY+A8rxkvVMnmQ/k7rUTme/glDQ3z5xVx+uHbS2/a5M1jSM/71cXE6YnSrR it0CK7CHomq2RzHsKf7oH7GD4kFkukMwFKeMoqz75JWz3352VZPTF53chCIqRSgO hrgGwZ7WF6pUUUhsn1ZdZsnBPA2Fou2uwslyLSAiE+OYEH2/NSVIOUcorjQcWqU/ 0Kix5yb8X1ZzRMhR+TVrTD5V0jguqp2buXq+0P2XlU6MoO2vy7iNf2eXvPg8sF8C anjTCKgmkzy7eyT2uzfDaNZAyfSBKb1TiKiR9zA0SRChJkCi1ErJEXDGeHiptvSA +D2k68Ils2LqsvdrnEd2XvVFMllh0iq7b+16o7D+Els0WRbnHpfYCaqfOuF5F4U0 SmeyI0ruawNDc5e9EBKXstt0/R9AMOetyTcTu29U2ZVo90zGaT1ofT8+R1jJ0kGa bPARJZrgecgv1E9Qnnnd =8InA -----END PGP SIGNATURE----- Merge tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO changes from Linus Walleij: "This is the bulk of GPIO changes for the v3.18 development cycle: - Increase the default ARCH_NR_GPIO from 256 to 512. This was done to avoid having a custom <asm/gpio.h> header for the x86 architecture - GPIO is custom and complicated enough as it is already! We want to move to a radix to store the descriptors going forward, and finally get rid of this fixed array size altogether. - Endgame patching of the gpio_remove() semantics initiated by Abdoulaye Berthe. It is not accepted by the system that the removal of a GPIO chip fails during eg reboot or shutdown, and therefore the return value has now painfully been refactored away. For special cases like GPIO expanders on a hot-pluggable bus like USB, we may later add some gpiochip_try_remove() call, but for the cases we have now, return values are moot. - Some incremental refactoring of the gpiolib core and ACPI GPIO library for more descriptor usage. - Refactor the chained IRQ handler set-up method to handle also threaded, nested interrupts and set up the parent IRQ correctly. Switch STMPE and TC3589x drivers to use this registration method. - Add a .irq_not_threaded flag to the struct gpio_chip, so that also GPIO expanders that block but are still not using threaded IRQ handlers. - New drivers for the ARM64 X-Gene SoC GPIO controller. - The syscon GPIO driver has been improved to handle the "DSP GPIO" found on the TI Keystone 2 SoC:s. - ADNP driver switched to use gpiolib irqchip helpers. - Refactor the DWAPB driver to support being instantiated from and MFD cell (platform device). - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP, Xilinx and Crystalcove drivers. - Various minor fixes" * tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (52 commits) gpio: pch: Build context save/restore only for PM pinctrl: abx500: get rid of unused variable gpio: ks8695: fix 'else should follow close brace '}'' gpio: stmpe: add verbose debug code gpio: stmpe: fix up interrupt enable logic gpio: staticize xway_stp_init() gpio: handle also nested irqchips in the chained handler set-up gpio: set parent irq on chained handlers gpiolib: irqchip: use irq_find_mapping while removing irqchip gpio: crystalcove: support virtual GPIO pinctrl: bcm281xx: make Kconfig dependency more strict gpio: kona: enable only on BCM_MOBILE or for compile testing gpio, bcm-kona, LLVMLinux: Remove use of __initconst gpio: Fix ngpio in gpio-xilinx driver gpio: dwapb: fix pointer to integer cast gpio: xgene: Remove unneeded #ifdef CONFIG_OF guard gpio: xgene: Remove unneeded forward declation for struct xgene_gpio gpio: xgene: Fix missing spin_lock_init() gpio: ks8695: fix switch case indentation gpiolib: add irq_not_threaded flag to gpio_chip ...
260 lines
6.1 KiB
C
260 lines
6.1 KiB
C
/*
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* Broadcom specific AMBA
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* GPIO driver
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*
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* Copyright 2011, Broadcom Corporation
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* Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include <linux/gpio.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/export.h>
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#include <linux/bcma/bcma.h>
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#include "bcma_private.h"
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static inline struct bcma_drv_cc *bcma_gpio_get_cc(struct gpio_chip *chip)
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{
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return container_of(chip, struct bcma_drv_cc, gpio);
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}
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static int bcma_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
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{
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struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
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return !!bcma_chipco_gpio_in(cc, 1 << gpio);
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}
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static void bcma_gpio_set_value(struct gpio_chip *chip, unsigned gpio,
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int value)
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{
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struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
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bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0);
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}
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static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
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{
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struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
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bcma_chipco_gpio_outen(cc, 1 << gpio, 0);
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return 0;
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}
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static int bcma_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
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int value)
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{
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struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
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bcma_chipco_gpio_outen(cc, 1 << gpio, 1 << gpio);
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bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0);
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return 0;
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}
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static int bcma_gpio_request(struct gpio_chip *chip, unsigned gpio)
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{
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struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
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bcma_chipco_gpio_control(cc, 1 << gpio, 0);
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/* clear pulldown */
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bcma_chipco_gpio_pulldown(cc, 1 << gpio, 0);
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/* Set pullup */
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bcma_chipco_gpio_pullup(cc, 1 << gpio, 1 << gpio);
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return 0;
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}
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static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio)
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{
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struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
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/* clear pullup */
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bcma_chipco_gpio_pullup(cc, 1 << gpio, 0);
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}
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#if IS_BUILTIN(CONFIG_BCM47XX)
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static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
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{
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struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
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if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
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return irq_find_mapping(cc->irq_domain, gpio);
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else
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return -EINVAL;
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}
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static void bcma_gpio_irq_unmask(struct irq_data *d)
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{
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struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d);
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int gpio = irqd_to_hwirq(d);
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u32 val = bcma_chipco_gpio_in(cc, BIT(gpio));
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bcma_chipco_gpio_polarity(cc, BIT(gpio), val);
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bcma_chipco_gpio_intmask(cc, BIT(gpio), BIT(gpio));
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}
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static void bcma_gpio_irq_mask(struct irq_data *d)
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{
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struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d);
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int gpio = irqd_to_hwirq(d);
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bcma_chipco_gpio_intmask(cc, BIT(gpio), 0);
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}
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static struct irq_chip bcma_gpio_irq_chip = {
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.name = "BCMA-GPIO",
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.irq_mask = bcma_gpio_irq_mask,
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.irq_unmask = bcma_gpio_irq_unmask,
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};
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static irqreturn_t bcma_gpio_irq_handler(int irq, void *dev_id)
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{
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struct bcma_drv_cc *cc = dev_id;
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u32 val = bcma_cc_read32(cc, BCMA_CC_GPIOIN);
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u32 mask = bcma_cc_read32(cc, BCMA_CC_GPIOIRQ);
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u32 pol = bcma_cc_read32(cc, BCMA_CC_GPIOPOL);
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unsigned long irqs = (val ^ pol) & mask;
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int gpio;
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if (!irqs)
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return IRQ_NONE;
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for_each_set_bit(gpio, &irqs, cc->gpio.ngpio)
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generic_handle_irq(bcma_gpio_to_irq(&cc->gpio, gpio));
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bcma_chipco_gpio_polarity(cc, irqs, val & irqs);
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return IRQ_HANDLED;
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}
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static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc)
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{
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struct gpio_chip *chip = &cc->gpio;
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int gpio, hwirq, err;
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if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC)
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return 0;
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cc->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
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&irq_domain_simple_ops, cc);
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if (!cc->irq_domain) {
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err = -ENODEV;
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goto err_irq_domain;
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}
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for (gpio = 0; gpio < chip->ngpio; gpio++) {
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int irq = irq_create_mapping(cc->irq_domain, gpio);
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irq_set_chip_data(irq, cc);
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irq_set_chip_and_handler(irq, &bcma_gpio_irq_chip,
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handle_simple_irq);
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}
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hwirq = bcma_core_irq(cc->core);
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err = request_irq(hwirq, bcma_gpio_irq_handler, IRQF_SHARED, "gpio",
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cc);
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if (err)
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goto err_req_irq;
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bcma_chipco_gpio_intmask(cc, ~0, 0);
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bcma_cc_set32(cc, BCMA_CC_IRQMASK, BCMA_CC_IRQ_GPIO);
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return 0;
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err_req_irq:
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for (gpio = 0; gpio < chip->ngpio; gpio++) {
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int irq = irq_find_mapping(cc->irq_domain, gpio);
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irq_dispose_mapping(irq);
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}
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irq_domain_remove(cc->irq_domain);
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err_irq_domain:
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return err;
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}
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static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
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{
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struct gpio_chip *chip = &cc->gpio;
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int gpio;
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if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC)
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return;
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bcma_cc_mask32(cc, BCMA_CC_IRQMASK, ~BCMA_CC_IRQ_GPIO);
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free_irq(bcma_core_irq(cc->core), cc);
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for (gpio = 0; gpio < chip->ngpio; gpio++) {
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int irq = irq_find_mapping(cc->irq_domain, gpio);
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irq_dispose_mapping(irq);
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}
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irq_domain_remove(cc->irq_domain);
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}
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#else
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static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc)
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{
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return 0;
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}
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static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
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{
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}
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#endif
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int bcma_gpio_init(struct bcma_drv_cc *cc)
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{
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struct gpio_chip *chip = &cc->gpio;
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int err;
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chip->label = "bcma_gpio";
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chip->owner = THIS_MODULE;
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chip->request = bcma_gpio_request;
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chip->free = bcma_gpio_free;
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chip->get = bcma_gpio_get_value;
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chip->set = bcma_gpio_set_value;
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chip->direction_input = bcma_gpio_direction_input;
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chip->direction_output = bcma_gpio_direction_output;
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#if IS_BUILTIN(CONFIG_BCM47XX)
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chip->to_irq = bcma_gpio_to_irq;
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#endif
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#if IS_BUILTIN(CONFIG_OF)
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if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
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chip->of_node = cc->core->dev.of_node;
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#endif
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switch (cc->core->bus->chipinfo.id) {
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case BCMA_CHIP_ID_BCM5357:
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case BCMA_CHIP_ID_BCM53572:
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chip->ngpio = 32;
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break;
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default:
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chip->ngpio = 16;
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}
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/* There is just one SoC in one device and its GPIO addresses should be
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* deterministic to address them more easily. The other buses could get
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* a random base number. */
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if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
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chip->base = 0;
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else
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chip->base = -1;
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err = bcma_gpio_irq_domain_init(cc);
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if (err)
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return err;
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err = gpiochip_add(chip);
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if (err) {
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bcma_gpio_irq_domain_exit(cc);
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return err;
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}
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return 0;
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}
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int bcma_gpio_unregister(struct bcma_drv_cc *cc)
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{
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bcma_gpio_irq_domain_exit(cc);
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gpiochip_remove(&cc->gpio);
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return 0;
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}
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