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fddbfb1c65
sysfs interface to read pcie speed&width info on navi1x. v2: fix warning (trivial) Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
43 lines
1.7 KiB
C
43 lines
1.7 KiB
C
/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __NAVI10_PPT_H__
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#define __NAVI10_PPT_H__
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#define NAVI10_PEAK_SCLK_XTX (1830)
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#define NAVI10_PEAK_SCLK_XT (1755)
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#define NAVI10_PEAK_SCLK_XL (1625)
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#define NAVI14_UMD_PSTATE_PEAK_XT_GFXCLK (1670)
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#define NAVI14_UMD_PSTATE_PEAK_XTM_GFXCLK (1448)
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#define NAVI14_UMD_PSTATE_PEAK_XLM_GFXCLK (1181)
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#define NAVI14_UMD_PSTATE_PEAK_XTX_GFXCLK (1717)
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#define NAVI14_UMD_PSTATE_PEAK_XL_GFXCLK (1448)
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#define NAVI10_VOLTAGE_SCALE (4)
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#define smnPCIE_LC_SPEED_CNTL 0x11140290
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#define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288
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extern void navi10_set_ppt_funcs(struct smu_context *smu);
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#endif
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