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735ee005c3
This patch adds csky registers' definition, bitops, byteorder, asm-offsets codes. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
26 lines
382 B
C
26 lines
382 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_REGS_OPS_H
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#define __ASM_REGS_OPS_H
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#define mfcr(reg) \
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({ \
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unsigned int tmp; \
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asm volatile( \
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"mfcr %0, "reg"\n" \
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: "=r"(tmp) \
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: \
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: "memory"); \
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tmp; \
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})
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#define mtcr(reg, val) \
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({ \
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asm volatile( \
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"mtcr %0, "reg"\n" \
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: \
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: "r"(val) \
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: "memory"); \
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})
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#endif /* __ASM_REGS_OPS_H */
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