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a8fb40966f
All Zen or newer CPU which support C3 shares cache. Its not necessary to flush the caches in software before entering C3. This will cause drop in performance for the cores which share some caches. ARB_DIS is not used with current AMD C state implementation. So set related flags correctly. Signed-off-by: Deepak Sharma <deepak.sharma@amd.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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.. | ||
apei.c | ||
boot.c | ||
cppc_msr.c | ||
cstate.c | ||
Makefile | ||
sleep.c | ||
sleep.h | ||
wakeup_32.S | ||
wakeup_64.S |