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82c298100a
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 44 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528170025.980374610@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
44 lines
1.2 KiB
C
44 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* NETjet common header file
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*
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* Author Karsten Keil
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* based on work of Matt Henderson and Daniel Potts,
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* Traverse Technologies P/L www.traverse.com.au
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*
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* Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
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*/
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#define NJ_CTRL 0x00
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#define NJ_DMACTRL 0x01
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#define NJ_AUXCTRL 0x02
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#define NJ_AUXDATA 0x03
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#define NJ_IRQMASK0 0x04
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#define NJ_IRQMASK1 0x05
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#define NJ_IRQSTAT0 0x06
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#define NJ_IRQSTAT1 0x07
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#define NJ_DMA_READ_START 0x08
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#define NJ_DMA_READ_IRQ 0x0c
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#define NJ_DMA_READ_END 0x10
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#define NJ_DMA_READ_ADR 0x14
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#define NJ_DMA_WRITE_START 0x18
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#define NJ_DMA_WRITE_IRQ 0x1c
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#define NJ_DMA_WRITE_END 0x20
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#define NJ_DMA_WRITE_ADR 0x24
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#define NJ_PULSE_CNT 0x28
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#define NJ_ISAC_OFF 0xc0
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#define NJ_ISACIRQ 0x10
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#define NJ_IRQM0_RD_MASK 0x03
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#define NJ_IRQM0_RD_IRQ 0x01
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#define NJ_IRQM0_RD_END 0x02
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#define NJ_IRQM0_WR_MASK 0x0c
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#define NJ_IRQM0_WR_IRQ 0x04
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#define NJ_IRQM0_WR_END 0x08
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/* one page here is no need to be smaller */
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#define NJ_DMA_SIZE 4096
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/* 2 * 64 byte is a compromise between IRQ count and latency */
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#define NJ_DMA_RXSIZE 128 /* 2 * 64 */
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#define NJ_DMA_TXSIZE 128 /* 2 * 64 */
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