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![Darren Powell](/assets/img/avatar_default.png)
Eliminating the warnings produced by sphinx when processing the sphinx comments in amdgpu_device.c & amdgpu_mn.c Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
510 lines
13 KiB
C
510 lines
13 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Christian König <christian.koenig@amd.com>
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*/
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/**
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* DOC: MMU Notifier
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*
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* For coherent userptr handling registers an MMU notifier to inform the driver
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* about updates on the page tables of a process.
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*
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* When somebody tries to invalidate the page tables we block the update until
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* all operations on the pages in question are completed, then those pages are
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* marked as accessed and also dirty if it wasn't a read only access.
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*
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* New command submissions using the userptrs in question are delayed until all
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* page table invalidation are completed and we once more see a coherent process
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* address space.
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*/
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#include <linux/firmware.h>
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#include <linux/module.h>
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#include <linux/mmu_notifier.h>
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#include <linux/interval_tree.h>
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#include <drm/drmP.h>
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#include <drm/drm.h>
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#include "amdgpu.h"
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#include "amdgpu_amdkfd.h"
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/**
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* struct amdgpu_mn
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*
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* @adev: amdgpu device pointer
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* @mm: process address space
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* @mn: MMU notifier structure
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* @type: type of MMU notifier
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* @work: destruction work item
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* @node: hash table node to find structure by adev and mn
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* @lock: rw semaphore protecting the notifier nodes
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* @objects: interval tree containing amdgpu_mn_nodes
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* @read_lock: mutex for recursive locking of @lock
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* @recursion: depth of recursion
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*
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* Data for each amdgpu device and process address space.
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*/
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struct amdgpu_mn {
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/* constant after initialisation */
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struct amdgpu_device *adev;
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struct mm_struct *mm;
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struct mmu_notifier mn;
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enum amdgpu_mn_type type;
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/* only used on destruction */
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struct work_struct work;
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/* protected by adev->mn_lock */
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struct hlist_node node;
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/* objects protected by lock */
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struct rw_semaphore lock;
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struct rb_root_cached objects;
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struct mutex read_lock;
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atomic_t recursion;
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};
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/**
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* struct amdgpu_mn_node
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*
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* @it: interval node defining start-last of the affected address range
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* @bos: list of all BOs in the affected address range
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*
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* Manages all BOs which are affected of a certain range of address space.
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*/
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struct amdgpu_mn_node {
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struct interval_tree_node it;
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struct list_head bos;
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};
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/**
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* amdgpu_mn_destroy - destroy the MMU notifier
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*
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* @work: previously sheduled work item
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*
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* Lazy destroys the notifier from a work item
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*/
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static void amdgpu_mn_destroy(struct work_struct *work)
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{
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struct amdgpu_mn *amn = container_of(work, struct amdgpu_mn, work);
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struct amdgpu_device *adev = amn->adev;
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struct amdgpu_mn_node *node, *next_node;
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struct amdgpu_bo *bo, *next_bo;
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mutex_lock(&adev->mn_lock);
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down_write(&amn->lock);
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hash_del(&amn->node);
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rbtree_postorder_for_each_entry_safe(node, next_node,
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&amn->objects.rb_root, it.rb) {
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list_for_each_entry_safe(bo, next_bo, &node->bos, mn_list) {
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bo->mn = NULL;
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list_del_init(&bo->mn_list);
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}
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kfree(node);
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}
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up_write(&amn->lock);
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mutex_unlock(&adev->mn_lock);
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mmu_notifier_unregister_no_release(&amn->mn, amn->mm);
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kfree(amn);
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}
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/**
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* amdgpu_mn_release - callback to notify about mm destruction
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*
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* @mn: our notifier
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* @mm: the mm this callback is about
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*
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* Shedule a work item to lazy destroy our notifier.
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*/
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static void amdgpu_mn_release(struct mmu_notifier *mn,
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struct mm_struct *mm)
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{
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struct amdgpu_mn *amn = container_of(mn, struct amdgpu_mn, mn);
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INIT_WORK(&amn->work, amdgpu_mn_destroy);
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schedule_work(&amn->work);
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}
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/**
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* amdgpu_mn_lock - take the write side lock for this notifier
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*
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* @mn: our notifier
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*/
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void amdgpu_mn_lock(struct amdgpu_mn *mn)
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{
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if (mn)
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down_write(&mn->lock);
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}
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/**
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* amdgpu_mn_unlock - drop the write side lock for this notifier
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*
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* @mn: our notifier
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*/
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void amdgpu_mn_unlock(struct amdgpu_mn *mn)
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{
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if (mn)
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up_write(&mn->lock);
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}
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/**
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* amdgpu_mn_read_lock - take the read side lock for this notifier
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*
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* @amn: our notifier
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*/
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static void amdgpu_mn_read_lock(struct amdgpu_mn *amn)
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{
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mutex_lock(&amn->read_lock);
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if (atomic_inc_return(&amn->recursion) == 1)
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down_read_non_owner(&amn->lock);
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mutex_unlock(&amn->read_lock);
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}
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/**
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* amdgpu_mn_read_unlock - drop the read side lock for this notifier
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*
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* @amn: our notifier
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*/
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static void amdgpu_mn_read_unlock(struct amdgpu_mn *amn)
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{
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if (atomic_dec_return(&amn->recursion) == 0)
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up_read_non_owner(&amn->lock);
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}
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/**
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* amdgpu_mn_invalidate_node - unmap all BOs of a node
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*
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* @node: the node with the BOs to unmap
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* @start: start of address range affected
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* @end: end of address range affected
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*
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* Block for operations on BOs to finish and mark pages as accessed and
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* potentially dirty.
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*/
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static void amdgpu_mn_invalidate_node(struct amdgpu_mn_node *node,
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unsigned long start,
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unsigned long end)
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{
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struct amdgpu_bo *bo;
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long r;
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list_for_each_entry(bo, &node->bos, mn_list) {
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if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start, end))
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continue;
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r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
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true, false, MAX_SCHEDULE_TIMEOUT);
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if (r <= 0)
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DRM_ERROR("(%ld) failed to wait for user bo\n", r);
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amdgpu_ttm_tt_mark_user_pages(bo->tbo.ttm);
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}
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}
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/**
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* amdgpu_mn_invalidate_range_start_gfx - callback to notify about mm change
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*
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* @mn: our notifier
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* @mm: the mm this callback is about
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* @start: start of updated range
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* @end: end of updated range
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*
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* Block for operations on BOs to finish and mark pages as accessed and
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* potentially dirty.
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*/
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static void amdgpu_mn_invalidate_range_start_gfx(struct mmu_notifier *mn,
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struct mm_struct *mm,
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unsigned long start,
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unsigned long end)
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{
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struct amdgpu_mn *amn = container_of(mn, struct amdgpu_mn, mn);
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struct interval_tree_node *it;
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/* notification is exclusive, but interval is inclusive */
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end -= 1;
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amdgpu_mn_read_lock(amn);
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it = interval_tree_iter_first(&amn->objects, start, end);
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while (it) {
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struct amdgpu_mn_node *node;
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node = container_of(it, struct amdgpu_mn_node, it);
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it = interval_tree_iter_next(it, start, end);
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amdgpu_mn_invalidate_node(node, start, end);
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}
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}
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/**
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* amdgpu_mn_invalidate_range_start_hsa - callback to notify about mm change
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*
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* @mn: our notifier
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* @mm: the mm this callback is about
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* @start: start of updated range
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* @end: end of updated range
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*
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* We temporarily evict all BOs between start and end. This
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* necessitates evicting all user-mode queues of the process. The BOs
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* are restorted in amdgpu_mn_invalidate_range_end_hsa.
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*/
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static void amdgpu_mn_invalidate_range_start_hsa(struct mmu_notifier *mn,
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struct mm_struct *mm,
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unsigned long start,
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unsigned long end)
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{
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struct amdgpu_mn *amn = container_of(mn, struct amdgpu_mn, mn);
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struct interval_tree_node *it;
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/* notification is exclusive, but interval is inclusive */
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end -= 1;
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amdgpu_mn_read_lock(amn);
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it = interval_tree_iter_first(&amn->objects, start, end);
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while (it) {
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struct amdgpu_mn_node *node;
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struct amdgpu_bo *bo;
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node = container_of(it, struct amdgpu_mn_node, it);
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it = interval_tree_iter_next(it, start, end);
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list_for_each_entry(bo, &node->bos, mn_list) {
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struct kgd_mem *mem = bo->kfd_bo;
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if (amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm,
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start, end))
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amdgpu_amdkfd_evict_userptr(mem, mm);
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}
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}
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}
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/**
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* amdgpu_mn_invalidate_range_end - callback to notify about mm change
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*
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* @mn: our notifier
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* @mm: the mm this callback is about
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* @start: start of updated range
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* @end: end of updated range
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*
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* Release the lock again to allow new command submissions.
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*/
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static void amdgpu_mn_invalidate_range_end(struct mmu_notifier *mn,
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struct mm_struct *mm,
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unsigned long start,
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unsigned long end)
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{
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struct amdgpu_mn *amn = container_of(mn, struct amdgpu_mn, mn);
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amdgpu_mn_read_unlock(amn);
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}
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static const struct mmu_notifier_ops amdgpu_mn_ops[] = {
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[AMDGPU_MN_TYPE_GFX] = {
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.release = amdgpu_mn_release,
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.invalidate_range_start = amdgpu_mn_invalidate_range_start_gfx,
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.invalidate_range_end = amdgpu_mn_invalidate_range_end,
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},
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[AMDGPU_MN_TYPE_HSA] = {
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.release = amdgpu_mn_release,
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.invalidate_range_start = amdgpu_mn_invalidate_range_start_hsa,
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.invalidate_range_end = amdgpu_mn_invalidate_range_end,
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},
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};
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/* Low bits of any reasonable mm pointer will be unused due to struct
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* alignment. Use these bits to make a unique key from the mm pointer
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* and notifier type.
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*/
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#define AMDGPU_MN_KEY(mm, type) ((unsigned long)(mm) + (type))
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/**
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* amdgpu_mn_get - create notifier context
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*
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* @adev: amdgpu device pointer
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* @type: type of MMU notifier context
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*
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* Creates a notifier context for current->mm.
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*/
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struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev,
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enum amdgpu_mn_type type)
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{
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struct mm_struct *mm = current->mm;
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struct amdgpu_mn *amn;
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unsigned long key = AMDGPU_MN_KEY(mm, type);
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int r;
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mutex_lock(&adev->mn_lock);
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if (down_write_killable(&mm->mmap_sem)) {
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mutex_unlock(&adev->mn_lock);
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return ERR_PTR(-EINTR);
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}
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hash_for_each_possible(adev->mn_hash, amn, node, key)
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if (AMDGPU_MN_KEY(amn->mm, amn->type) == key)
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goto release_locks;
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amn = kzalloc(sizeof(*amn), GFP_KERNEL);
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if (!amn) {
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amn = ERR_PTR(-ENOMEM);
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goto release_locks;
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}
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amn->adev = adev;
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amn->mm = mm;
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init_rwsem(&amn->lock);
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amn->type = type;
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amn->mn.ops = &amdgpu_mn_ops[type];
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amn->objects = RB_ROOT_CACHED;
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mutex_init(&amn->read_lock);
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atomic_set(&amn->recursion, 0);
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r = __mmu_notifier_register(&amn->mn, mm);
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if (r)
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goto free_amn;
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hash_add(adev->mn_hash, &amn->node, AMDGPU_MN_KEY(mm, type));
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release_locks:
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up_write(&mm->mmap_sem);
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mutex_unlock(&adev->mn_lock);
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return amn;
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free_amn:
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up_write(&mm->mmap_sem);
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mutex_unlock(&adev->mn_lock);
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kfree(amn);
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return ERR_PTR(r);
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}
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/**
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* amdgpu_mn_register - register a BO for notifier updates
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*
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* @bo: amdgpu buffer object
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* @addr: userptr addr we should monitor
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*
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* Registers an MMU notifier for the given BO at the specified address.
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* Returns 0 on success, -ERRNO if anything goes wrong.
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*/
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int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
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{
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unsigned long end = addr + amdgpu_bo_size(bo) - 1;
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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enum amdgpu_mn_type type =
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bo->kfd_bo ? AMDGPU_MN_TYPE_HSA : AMDGPU_MN_TYPE_GFX;
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struct amdgpu_mn *amn;
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struct amdgpu_mn_node *node = NULL, *new_node;
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struct list_head bos;
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struct interval_tree_node *it;
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amn = amdgpu_mn_get(adev, type);
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if (IS_ERR(amn))
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return PTR_ERR(amn);
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new_node = kmalloc(sizeof(*new_node), GFP_KERNEL);
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if (!new_node)
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return -ENOMEM;
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INIT_LIST_HEAD(&bos);
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down_write(&amn->lock);
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while ((it = interval_tree_iter_first(&amn->objects, addr, end))) {
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kfree(node);
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node = container_of(it, struct amdgpu_mn_node, it);
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interval_tree_remove(&node->it, &amn->objects);
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addr = min(it->start, addr);
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end = max(it->last, end);
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list_splice(&node->bos, &bos);
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}
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if (!node)
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node = new_node;
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else
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kfree(new_node);
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bo->mn = amn;
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node->it.start = addr;
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node->it.last = end;
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INIT_LIST_HEAD(&node->bos);
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list_splice(&bos, &node->bos);
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list_add(&bo->mn_list, &node->bos);
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interval_tree_insert(&node->it, &amn->objects);
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up_write(&amn->lock);
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return 0;
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}
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/**
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* amdgpu_mn_unregister - unregister a BO for notifier updates
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*
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* @bo: amdgpu buffer object
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*
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* Remove any registration of MMU notifier updates from the buffer object.
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*/
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void amdgpu_mn_unregister(struct amdgpu_bo *bo)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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struct amdgpu_mn *amn;
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struct list_head *head;
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mutex_lock(&adev->mn_lock);
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amn = bo->mn;
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if (amn == NULL) {
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mutex_unlock(&adev->mn_lock);
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return;
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}
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down_write(&amn->lock);
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/* save the next list entry for later */
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head = bo->mn_list.next;
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bo->mn = NULL;
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list_del_init(&bo->mn_list);
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if (list_empty(head)) {
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struct amdgpu_mn_node *node;
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node = container_of(head, struct amdgpu_mn_node, bos);
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interval_tree_remove(&node->it, &amn->objects);
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kfree(node);
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}
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up_write(&amn->lock);
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mutex_unlock(&adev->mn_lock);
|
|
}
|
|
|