Conor Dooley 991994509e dt-bindings: riscv: add a capacity-dmips-mhz cpu property ... Since commit 03f11f03db ("RISC-V: Parse cpu topology during boot.") RISC-V has used the generic arch topology code, which provides for disparate CPU capacities. We never defined a binding to acquire this information from the DT though, so document the one already used by the generic arch topology code: "capacity-dmips-mhz". Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230104180513.1379453-3-conor@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-02-14 19:24:06 -08:00
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bindings	dt-bindings: riscv: add a capacity-dmips-mhz cpu property	2023-02-14 19:24:06 -08:00
changesets.rst
dynamic-resolution-notes.rst
index.rst
kernel-api.rst
of_unittest.rst
overlay-notes.rst
usage-model.rst