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![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
367 lines
8.4 KiB
C
367 lines
8.4 KiB
C
/*
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* drivers/char/watchdog/pnx4008_wdt.c
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*
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* Watchdog driver for PNX4008 board
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*
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* Authors: Dmitry Chigirev <source@mvista.com>,
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* Vitaly Wool <vitalywool@gmail.com>
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* Based on sa1100 driver,
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* Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
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*
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* 2005-2006 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <linux/ioport.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <mach/hardware.h>
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#define MODULE_NAME "PNX4008-WDT: "
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/* WatchDog Timer - Chapter 23 Page 207 */
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#define DEFAULT_HEARTBEAT 19
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#define MAX_HEARTBEAT 60
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/* Watchdog timer register set definition */
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#define WDTIM_INT(p) ((p) + 0x0)
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#define WDTIM_CTRL(p) ((p) + 0x4)
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#define WDTIM_COUNTER(p) ((p) + 0x8)
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#define WDTIM_MCTRL(p) ((p) + 0xC)
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#define WDTIM_MATCH0(p) ((p) + 0x10)
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#define WDTIM_EMR(p) ((p) + 0x14)
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#define WDTIM_PULSE(p) ((p) + 0x18)
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#define WDTIM_RES(p) ((p) + 0x1C)
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/* WDTIM_INT bit definitions */
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#define MATCH_INT 1
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/* WDTIM_CTRL bit definitions */
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#define COUNT_ENAB 1
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#define RESET_COUNT (1 << 1)
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#define DEBUG_EN (1 << 2)
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/* WDTIM_MCTRL bit definitions */
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#define MR0_INT 1
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#undef RESET_COUNT0
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#define RESET_COUNT0 (1 << 2)
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#define STOP_COUNT0 (1 << 2)
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#define M_RES1 (1 << 3)
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#define M_RES2 (1 << 4)
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#define RESFRC1 (1 << 5)
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#define RESFRC2 (1 << 6)
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/* WDTIM_EMR bit definitions */
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#define EXT_MATCH0 1
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#define MATCH_OUTPUT_HIGH (2 << 4) /*a MATCH_CTRL setting */
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/* WDTIM_RES bit definitions */
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#define WDOG_RESET 1 /* read only */
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#define WDOG_COUNTER_RATE 13000000 /*the counter clock is 13 MHz fixed */
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static int nowayout = WATCHDOG_NOWAYOUT;
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static int heartbeat = DEFAULT_HEARTBEAT;
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static DEFINE_SPINLOCK(io_lock);
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static unsigned long wdt_status;
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#define WDT_IN_USE 0
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#define WDT_OK_TO_CLOSE 1
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#define WDT_REGION_INITED 2
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#define WDT_DEVICE_INITED 3
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static unsigned long boot_status;
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static struct resource *wdt_mem;
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static void __iomem *wdt_base;
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struct clk *wdt_clk;
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static void wdt_enable(void)
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{
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spin_lock(&io_lock);
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/* stop counter, initiate counter reset */
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__raw_writel(RESET_COUNT, WDTIM_CTRL(wdt_base));
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/*wait for reset to complete. 100% guarantee event */
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while (__raw_readl(WDTIM_COUNTER(wdt_base)))
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cpu_relax();
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/* internal and external reset, stop after that */
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__raw_writel(M_RES2 | STOP_COUNT0 | RESET_COUNT0,
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WDTIM_MCTRL(wdt_base));
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/* configure match output */
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__raw_writel(MATCH_OUTPUT_HIGH, WDTIM_EMR(wdt_base));
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/* clear interrupt, just in case */
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__raw_writel(MATCH_INT, WDTIM_INT(wdt_base));
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/* the longest pulse period 65541/(13*10^6) seconds ~ 5 ms. */
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__raw_writel(0xFFFF, WDTIM_PULSE(wdt_base));
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__raw_writel(heartbeat * WDOG_COUNTER_RATE, WDTIM_MATCH0(wdt_base));
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/*enable counter, stop when debugger active */
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__raw_writel(COUNT_ENAB | DEBUG_EN, WDTIM_CTRL(wdt_base));
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spin_unlock(&io_lock);
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}
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static void wdt_disable(void)
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{
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spin_lock(&io_lock);
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__raw_writel(0, WDTIM_CTRL(wdt_base)); /*stop counter */
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spin_unlock(&io_lock);
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}
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static int pnx4008_wdt_open(struct inode *inode, struct file *file)
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{
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int ret;
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if (test_and_set_bit(WDT_IN_USE, &wdt_status))
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return -EBUSY;
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clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
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ret = clk_enable(wdt_clk);
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if (ret) {
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clear_bit(WDT_IN_USE, &wdt_status);
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return ret;
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}
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wdt_enable();
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return nonseekable_open(inode, file);
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}
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static ssize_t pnx4008_wdt_write(struct file *file, const char *data,
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size_t len, loff_t *ppos)
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{
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if (len) {
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if (!nowayout) {
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size_t i;
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clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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set_bit(WDT_OK_TO_CLOSE, &wdt_status);
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}
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}
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wdt_enable();
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}
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return len;
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}
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static const struct watchdog_info ident = {
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.options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE |
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WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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.identity = "PNX4008 Watchdog",
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};
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static long pnx4008_wdt_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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int ret = -ENOTTY;
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int time;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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ret = copy_to_user((struct watchdog_info *)arg, &ident,
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sizeof(ident)) ? -EFAULT : 0;
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break;
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case WDIOC_GETSTATUS:
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ret = put_user(0, (int *)arg);
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break;
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case WDIOC_GETBOOTSTATUS:
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ret = put_user(boot_status, (int *)arg);
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break;
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case WDIOC_KEEPALIVE:
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wdt_enable();
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ret = 0;
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break;
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case WDIOC_SETTIMEOUT:
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ret = get_user(time, (int *)arg);
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if (ret)
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break;
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if (time <= 0 || time > MAX_HEARTBEAT) {
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ret = -EINVAL;
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break;
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}
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heartbeat = time;
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wdt_enable();
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/* Fall through */
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case WDIOC_GETTIMEOUT:
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ret = put_user(heartbeat, (int *)arg);
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break;
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}
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return ret;
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}
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static int pnx4008_wdt_release(struct inode *inode, struct file *file)
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{
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if (!test_bit(WDT_OK_TO_CLOSE, &wdt_status))
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printk(KERN_WARNING "WATCHDOG: Device closed unexpectdly\n");
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wdt_disable();
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clk_disable(wdt_clk);
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clear_bit(WDT_IN_USE, &wdt_status);
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clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
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return 0;
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}
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static const struct file_operations pnx4008_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = pnx4008_wdt_write,
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.unlocked_ioctl = pnx4008_wdt_ioctl,
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.open = pnx4008_wdt_open,
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.release = pnx4008_wdt_release,
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};
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static struct miscdevice pnx4008_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &pnx4008_wdt_fops,
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};
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static int __devinit pnx4008_wdt_probe(struct platform_device *pdev)
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{
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int ret = 0, size;
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struct resource *res;
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if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
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heartbeat = DEFAULT_HEARTBEAT;
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printk(KERN_INFO MODULE_NAME
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"PNX4008 Watchdog Timer: heartbeat %d sec\n", heartbeat);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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printk(KERN_INFO MODULE_NAME
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"failed to get memory region resouce\n");
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return -ENOENT;
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}
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size = resource_size(res);
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wdt_mem = request_mem_region(res->start, size, pdev->name);
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if (wdt_mem == NULL) {
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printk(KERN_INFO MODULE_NAME "failed to get memory region\n");
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return -ENOENT;
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}
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wdt_base = (void __iomem *)IO_ADDRESS(res->start);
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wdt_clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(wdt_clk)) {
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ret = PTR_ERR(wdt_clk);
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release_resource(wdt_mem);
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kfree(wdt_mem);
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goto out;
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}
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ret = clk_enable(wdt_clk);
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if (ret) {
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release_resource(wdt_mem);
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kfree(wdt_mem);
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goto out;
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}
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ret = misc_register(&pnx4008_wdt_miscdev);
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if (ret < 0) {
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printk(KERN_ERR MODULE_NAME "cannot register misc device\n");
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release_resource(wdt_mem);
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kfree(wdt_mem);
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clk_disable(wdt_clk);
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clk_put(wdt_clk);
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} else {
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boot_status = (__raw_readl(WDTIM_RES(wdt_base)) & WDOG_RESET) ?
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WDIOF_CARDRESET : 0;
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wdt_disable(); /*disable for now */
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clk_disable(wdt_clk);
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set_bit(WDT_DEVICE_INITED, &wdt_status);
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}
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out:
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return ret;
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}
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static int __devexit pnx4008_wdt_remove(struct platform_device *pdev)
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{
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misc_deregister(&pnx4008_wdt_miscdev);
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clk_disable(wdt_clk);
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clk_put(wdt_clk);
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if (wdt_mem) {
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release_resource(wdt_mem);
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kfree(wdt_mem);
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wdt_mem = NULL;
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}
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return 0;
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}
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static struct platform_driver platform_wdt_driver = {
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.driver = {
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.name = "pnx4008-watchdog",
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.owner = THIS_MODULE,
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},
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.probe = pnx4008_wdt_probe,
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.remove = __devexit_p(pnx4008_wdt_remove),
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};
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static int __init pnx4008_wdt_init(void)
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{
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return platform_driver_register(&platform_wdt_driver);
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}
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static void __exit pnx4008_wdt_exit(void)
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{
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platform_driver_unregister(&platform_wdt_driver);
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}
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module_init(pnx4008_wdt_init);
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module_exit(pnx4008_wdt_exit);
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MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
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MODULE_DESCRIPTION("PNX4008 Watchdog Driver");
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat,
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"Watchdog heartbeat period in seconds from 1 to "
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__MODULE_STRING(MAX_HEARTBEAT) ", default "
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__MODULE_STRING(DEFAULT_HEARTBEAT));
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module_param(nowayout, int, 0);
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MODULE_PARM_DESC(nowayout,
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"Set to 1 to keep watchdog running after device release");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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MODULE_ALIAS("platform:pnx4008-watchdog");
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