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![Cristian Ciocaltea](/assets/img/avatar_default.png)
Currently the max_raw_read and max_raw_write limits in regmap_spi struct
do not take into account the additional size of the transmitted register
address and padding. This may result in exceeding the maximum permitted
SPI message size, which could cause undefined behaviour, e.g. data
corruption.
Fix regmap_get_spi_bus() to properly adjust the above mentioned limits
by reserving space for the register address/padding as set in the regmap
configuration.
Fixes: f231ff38b7
("regmap: spi: Set regmap max raw r/w from max_transfer_size")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Lucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20220818104851.429479-1-cristian.ciocaltea@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
168 lines
4.2 KiB
C
168 lines
4.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Register map access API - SPI support
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//
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// Copyright 2011 Wolfson Microelectronics plc
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//
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// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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#include <linux/module.h>
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#include "internal.h"
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struct regmap_async_spi {
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struct regmap_async core;
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struct spi_message m;
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struct spi_transfer t[2];
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};
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static void regmap_spi_complete(void *data)
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{
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struct regmap_async_spi *async = data;
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regmap_async_complete_cb(&async->core, async->m.status);
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}
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static int regmap_spi_write(void *context, const void *data, size_t count)
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{
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struct device *dev = context;
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struct spi_device *spi = to_spi_device(dev);
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return spi_write(spi, data, count);
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}
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static int regmap_spi_gather_write(void *context,
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const void *reg, size_t reg_len,
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const void *val, size_t val_len)
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{
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struct device *dev = context;
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struct spi_device *spi = to_spi_device(dev);
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struct spi_message m;
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struct spi_transfer t[2] = { { .tx_buf = reg, .len = reg_len, },
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{ .tx_buf = val, .len = val_len, }, };
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spi_message_init(&m);
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spi_message_add_tail(&t[0], &m);
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spi_message_add_tail(&t[1], &m);
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return spi_sync(spi, &m);
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}
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static int regmap_spi_async_write(void *context,
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const void *reg, size_t reg_len,
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const void *val, size_t val_len,
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struct regmap_async *a)
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{
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struct regmap_async_spi *async = container_of(a,
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struct regmap_async_spi,
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core);
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struct device *dev = context;
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struct spi_device *spi = to_spi_device(dev);
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async->t[0].tx_buf = reg;
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async->t[0].len = reg_len;
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async->t[1].tx_buf = val;
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async->t[1].len = val_len;
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spi_message_init(&async->m);
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spi_message_add_tail(&async->t[0], &async->m);
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if (val)
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spi_message_add_tail(&async->t[1], &async->m);
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async->m.complete = regmap_spi_complete;
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async->m.context = async;
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return spi_async(spi, &async->m);
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}
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static struct regmap_async *regmap_spi_async_alloc(void)
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{
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struct regmap_async_spi *async_spi;
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async_spi = kzalloc(sizeof(*async_spi), GFP_KERNEL);
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if (!async_spi)
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return NULL;
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return &async_spi->core;
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}
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static int regmap_spi_read(void *context,
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const void *reg, size_t reg_size,
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void *val, size_t val_size)
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{
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struct device *dev = context;
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struct spi_device *spi = to_spi_device(dev);
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return spi_write_then_read(spi, reg, reg_size, val, val_size);
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}
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static const struct regmap_bus regmap_spi = {
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.write = regmap_spi_write,
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.gather_write = regmap_spi_gather_write,
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.async_write = regmap_spi_async_write,
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.async_alloc = regmap_spi_async_alloc,
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.read = regmap_spi_read,
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.read_flag_mask = 0x80,
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.reg_format_endian_default = REGMAP_ENDIAN_BIG,
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.val_format_endian_default = REGMAP_ENDIAN_BIG,
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};
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static const struct regmap_bus *regmap_get_spi_bus(struct spi_device *spi,
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const struct regmap_config *config)
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{
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size_t max_size = spi_max_transfer_size(spi);
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size_t max_msg_size, reg_reserve_size;
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struct regmap_bus *bus;
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if (max_size != SIZE_MAX) {
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bus = kmemdup(®map_spi, sizeof(*bus), GFP_KERNEL);
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if (!bus)
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return ERR_PTR(-ENOMEM);
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max_msg_size = spi_max_message_size(spi);
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reg_reserve_size = config->reg_bits / BITS_PER_BYTE
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+ config->pad_bits / BITS_PER_BYTE;
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if (max_size + reg_reserve_size > max_msg_size)
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max_size -= reg_reserve_size;
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bus->free_on_exit = true;
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bus->max_raw_read = max_size;
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bus->max_raw_write = max_size;
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return bus;
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}
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return ®map_spi;
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}
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struct regmap *__regmap_init_spi(struct spi_device *spi,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name)
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{
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const struct regmap_bus *bus = regmap_get_spi_bus(spi, config);
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if (IS_ERR(bus))
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return ERR_CAST(bus);
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return __regmap_init(&spi->dev, bus, &spi->dev, config, lock_key, lock_name);
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}
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EXPORT_SYMBOL_GPL(__regmap_init_spi);
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struct regmap *__devm_regmap_init_spi(struct spi_device *spi,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name)
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{
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const struct regmap_bus *bus = regmap_get_spi_bus(spi, config);
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if (IS_ERR(bus))
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return ERR_CAST(bus);
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return __devm_regmap_init(&spi->dev, bus, &spi->dev, config, lock_key, lock_name);
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}
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EXPORT_SYMBOL_GPL(__devm_regmap_init_spi);
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MODULE_LICENSE("GPL");
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