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549437a43f
A 100MHZ 32-bit timer will be wrapped up less than 43s. Although the kernel maintains a software high 32-bit count in the tick IRQ. But it's not applicable to the user mode APPs. Note: The kernel still uses the lower 32 bits of the timer. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200918132237.3552-9-thunder.leizhen@huawei.com
63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* ARM timer implementation, found in Integrator, Versatile and Realview
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* platforms. Not all platforms support all registers and bits in these
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* registers, so we mark them with A for Integrator AP, C for Integrator
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* CP, V for Versatile and R for Realview.
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*
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* Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
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* can have 16-bit or 32-bit selectable via a bit in the control register.
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*
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* Every SP804 contains two identical timers.
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*/
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#define NR_TIMERS 2
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#define TIMER_1_BASE 0x00
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#define TIMER_2_BASE 0x20
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#define TIMER_LOAD 0x00 /* ACVR rw */
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#define TIMER_VALUE 0x04 /* ACVR ro */
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#define TIMER_CTRL 0x08 /* ACVR rw */
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#define TIMER_CTRL_ONESHOT (1 << 0) /* CVR */
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#define TIMER_CTRL_32BIT (1 << 1) /* CVR */
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#define TIMER_CTRL_DIV1 (0 << 2) /* ACVR */
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#define TIMER_CTRL_DIV16 (1 << 2) /* ACVR */
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#define TIMER_CTRL_DIV256 (2 << 2) /* ACVR */
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#define TIMER_CTRL_IE (1 << 5) /* VR */
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#define TIMER_CTRL_PERIODIC (1 << 6) /* ACVR */
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#define TIMER_CTRL_ENABLE (1 << 7) /* ACVR */
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#define TIMER_INTCLR 0x0c /* ACVR wo */
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#define TIMER_RIS 0x10 /* CVR ro */
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#define TIMER_MIS 0x14 /* CVR ro */
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#define TIMER_BGLOAD 0x18 /* CVR rw */
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struct sp804_timer {
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int load;
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int load_h;
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int value;
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int value_h;
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int ctrl;
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int intclr;
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int ris;
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int mis;
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int bgload;
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int bgload_h;
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int timer_base[NR_TIMERS];
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int width;
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};
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struct sp804_clkevt {
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void __iomem *base;
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void __iomem *load;
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void __iomem *load_h;
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void __iomem *value;
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void __iomem *value_h;
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void __iomem *ctrl;
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void __iomem *intclr;
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void __iomem *ris;
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void __iomem *mis;
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void __iomem *bgload;
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void __iomem *bgload_h;
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unsigned long reload;
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int width;
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};
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