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![Viresh Kumar](/assets/img/avatar_default.png)
Set the newly added .register_em() callback with cpufreq_register_em_with_opp() to register with the EM core. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
200 lines
4.8 KiB
C
200 lines
4.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* CPU frequency scaling for OMAP using OPP information
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*
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* Copyright (C) 2005 Nokia Corporation
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* Written by Tony Lindgren <tony@atomide.com>
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*
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* Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
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*
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* Copyright (C) 2007-2011 Texas Instruments, Inc.
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* - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/pm_opp.h>
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#include <linux/cpu.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <asm/smp_plat.h>
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#include <asm/cpu.h>
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/* OPP tolerance in percentage */
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#define OPP_TOLERANCE 4
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static struct cpufreq_frequency_table *freq_table;
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static atomic_t freq_table_users = ATOMIC_INIT(0);
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static struct device *mpu_dev;
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static struct regulator *mpu_reg;
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static int omap_target(struct cpufreq_policy *policy, unsigned int index)
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{
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int r, ret;
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struct dev_pm_opp *opp;
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unsigned long freq, volt = 0, volt_old = 0, tol = 0;
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unsigned int old_freq, new_freq;
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old_freq = policy->cur;
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new_freq = freq_table[index].frequency;
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freq = new_freq * 1000;
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ret = clk_round_rate(policy->clk, freq);
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if (ret < 0) {
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dev_warn(mpu_dev,
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"CPUfreq: Cannot find matching frequency for %lu\n",
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freq);
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return ret;
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}
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freq = ret;
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if (mpu_reg) {
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opp = dev_pm_opp_find_freq_ceil(mpu_dev, &freq);
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if (IS_ERR(opp)) {
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dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n",
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__func__, new_freq);
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return -EINVAL;
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}
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volt = dev_pm_opp_get_voltage(opp);
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dev_pm_opp_put(opp);
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tol = volt * OPP_TOLERANCE / 100;
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volt_old = regulator_get_voltage(mpu_reg);
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}
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dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n",
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old_freq / 1000, volt_old ? volt_old / 1000 : -1,
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new_freq / 1000, volt ? volt / 1000 : -1);
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/* scaling up? scale voltage before frequency */
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if (mpu_reg && (new_freq > old_freq)) {
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r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
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if (r < 0) {
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dev_warn(mpu_dev, "%s: unable to scale voltage up.\n",
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__func__);
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return r;
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}
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}
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ret = clk_set_rate(policy->clk, new_freq * 1000);
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/* scaling down? scale voltage after frequency */
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if (mpu_reg && (new_freq < old_freq)) {
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r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
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if (r < 0) {
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dev_warn(mpu_dev, "%s: unable to scale voltage down.\n",
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__func__);
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clk_set_rate(policy->clk, old_freq * 1000);
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return r;
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}
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}
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return ret;
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}
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static inline void freq_table_free(void)
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{
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if (atomic_dec_and_test(&freq_table_users))
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dev_pm_opp_free_cpufreq_table(mpu_dev, &freq_table);
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}
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static int omap_cpu_init(struct cpufreq_policy *policy)
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{
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int result;
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policy->clk = clk_get(NULL, "cpufreq_ck");
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if (IS_ERR(policy->clk))
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return PTR_ERR(policy->clk);
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if (!freq_table) {
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result = dev_pm_opp_init_cpufreq_table(mpu_dev, &freq_table);
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if (result) {
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dev_err(mpu_dev,
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"%s: cpu%d: failed creating freq table[%d]\n",
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__func__, policy->cpu, result);
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clk_put(policy->clk);
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return result;
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}
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}
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atomic_inc_return(&freq_table_users);
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/* FIXME: what's the actual transition time? */
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cpufreq_generic_init(policy, freq_table, 300 * 1000);
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return 0;
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}
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static int omap_cpu_exit(struct cpufreq_policy *policy)
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{
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freq_table_free();
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clk_put(policy->clk);
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return 0;
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}
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static struct cpufreq_driver omap_driver = {
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = omap_target,
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.get = cpufreq_generic_get,
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.init = omap_cpu_init,
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.exit = omap_cpu_exit,
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.register_em = cpufreq_register_em_with_opp,
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.name = "omap",
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.attr = cpufreq_generic_attr,
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};
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static int omap_cpufreq_probe(struct platform_device *pdev)
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{
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mpu_dev = get_cpu_device(0);
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if (!mpu_dev) {
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pr_warn("%s: unable to get the MPU device\n", __func__);
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return -EINVAL;
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}
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mpu_reg = regulator_get(mpu_dev, "vcc");
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if (IS_ERR(mpu_reg)) {
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pr_warn("%s: unable to get MPU regulator\n", __func__);
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mpu_reg = NULL;
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} else {
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/*
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* Ensure physical regulator is present.
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* (e.g. could be dummy regulator.)
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*/
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if (regulator_get_voltage(mpu_reg) < 0) {
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pr_warn("%s: physical regulator not present for MPU\n",
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__func__);
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regulator_put(mpu_reg);
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mpu_reg = NULL;
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}
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}
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return cpufreq_register_driver(&omap_driver);
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}
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static int omap_cpufreq_remove(struct platform_device *pdev)
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{
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return cpufreq_unregister_driver(&omap_driver);
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}
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static struct platform_driver omap_cpufreq_platdrv = {
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.driver = {
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.name = "omap-cpufreq",
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},
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.probe = omap_cpufreq_probe,
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.remove = omap_cpufreq_remove,
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};
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module_platform_driver(omap_cpufreq_platdrv);
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MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
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MODULE_LICENSE("GPL");
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