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![Kars de Jong](/assets/img/avatar_default.png)
The msm6242_set()/msm6242_clear() functions are used when writing to Control Register D to set or clear the HOLD bit when reading the current time from the RTC. Doing this with a read-modify-write cycle will potentially clear an interrupt condition which occurs between the read and the write. The datasheet states the following about this: When writing the HOLD or 30 second adjust bits of register D, it is necessary to write the IRQ FLAG bit to a "1". Since the only other bits in the register are the 30 second adjust bit (which is not used) and the BUSY bit (which is read-only), the read-modify-write cycle can be replaced by a simple write with the IRQ FLAG bit set to 1 and the other bits (except HOLD) set to 0. Tested-by: Kars de Jong <jongk@linux-m68k.org> Signed-off-by: Kars de Jong <jongk@linux-m68k.org> Link: https://lore.kernel.org/r/20191116114620.9193-1-jongk@linux-m68k.org Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
228 lines
6.6 KiB
C
228 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Oki MSM6242 RTC Driver
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*
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* Copyright 2009 Geert Uytterhoeven
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*
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* Based on the A2000 TOD code in arch/m68k/amiga/config.c
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* Copyright (C) 1993 Hamish Macdonald
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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#include <linux/slab.h>
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enum {
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MSM6242_SECOND1 = 0x0, /* 1-second digit register */
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MSM6242_SECOND10 = 0x1, /* 10-second digit register */
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MSM6242_MINUTE1 = 0x2, /* 1-minute digit register */
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MSM6242_MINUTE10 = 0x3, /* 10-minute digit register */
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MSM6242_HOUR1 = 0x4, /* 1-hour digit register */
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MSM6242_HOUR10 = 0x5, /* PM/AM, 10-hour digit register */
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MSM6242_DAY1 = 0x6, /* 1-day digit register */
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MSM6242_DAY10 = 0x7, /* 10-day digit register */
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MSM6242_MONTH1 = 0x8, /* 1-month digit register */
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MSM6242_MONTH10 = 0x9, /* 10-month digit register */
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MSM6242_YEAR1 = 0xa, /* 1-year digit register */
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MSM6242_YEAR10 = 0xb, /* 10-year digit register */
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MSM6242_WEEK = 0xc, /* Week register */
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MSM6242_CD = 0xd, /* Control Register D */
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MSM6242_CE = 0xe, /* Control Register E */
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MSM6242_CF = 0xf, /* Control Register F */
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};
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#define MSM6242_HOUR10_AM (0 << 2)
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#define MSM6242_HOUR10_PM (1 << 2)
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#define MSM6242_HOUR10_HR_MASK (3 << 0)
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#define MSM6242_WEEK_SUNDAY 0
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#define MSM6242_WEEK_MONDAY 1
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#define MSM6242_WEEK_TUESDAY 2
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#define MSM6242_WEEK_WEDNESDAY 3
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#define MSM6242_WEEK_THURSDAY 4
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#define MSM6242_WEEK_FRIDAY 5
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#define MSM6242_WEEK_SATURDAY 6
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#define MSM6242_CD_30_S_ADJ (1 << 3) /* 30-second adjustment */
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#define MSM6242_CD_IRQ_FLAG (1 << 2)
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#define MSM6242_CD_BUSY (1 << 1)
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#define MSM6242_CD_HOLD (1 << 0)
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#define MSM6242_CE_T_MASK (3 << 2)
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#define MSM6242_CE_T_64HZ (0 << 2) /* period 1/64 second */
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#define MSM6242_CE_T_1HZ (1 << 2) /* period 1 second */
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#define MSM6242_CE_T_1MINUTE (2 << 2) /* period 1 minute */
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#define MSM6242_CE_T_1HOUR (3 << 2) /* period 1 hour */
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#define MSM6242_CE_ITRPT_STND (1 << 1)
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#define MSM6242_CE_MASK (1 << 0) /* STD.P output control */
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#define MSM6242_CF_TEST (1 << 3)
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#define MSM6242_CF_12H (0 << 2)
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#define MSM6242_CF_24H (1 << 2)
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#define MSM6242_CF_STOP (1 << 1)
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#define MSM6242_CF_REST (1 << 0) /* reset */
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struct msm6242_priv {
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u32 __iomem *regs;
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struct rtc_device *rtc;
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};
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static inline unsigned int msm6242_read(struct msm6242_priv *priv,
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unsigned int reg)
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{
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return __raw_readl(&priv->regs[reg]) & 0xf;
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}
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static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val,
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unsigned int reg)
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{
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__raw_writel(val, &priv->regs[reg]);
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}
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static void msm6242_lock(struct msm6242_priv *priv)
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{
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int cnt = 5;
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msm6242_write(priv, MSM6242_CD_HOLD|MSM6242_CD_IRQ_FLAG, MSM6242_CD);
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while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) {
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msm6242_write(priv, MSM6242_CD_IRQ_FLAG, MSM6242_CD);
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udelay(70);
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msm6242_write(priv, MSM6242_CD_HOLD|MSM6242_CD_IRQ_FLAG, MSM6242_CD);
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cnt--;
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}
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if (!cnt)
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pr_warn("timed out waiting for RTC (0x%x)\n",
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msm6242_read(priv, MSM6242_CD));
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}
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static void msm6242_unlock(struct msm6242_priv *priv)
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{
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msm6242_write(priv, MSM6242_CD_IRQ_FLAG, MSM6242_CD);
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}
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static int msm6242_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct msm6242_priv *priv = dev_get_drvdata(dev);
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msm6242_lock(priv);
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tm->tm_sec = msm6242_read(priv, MSM6242_SECOND10) * 10 +
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msm6242_read(priv, MSM6242_SECOND1);
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tm->tm_min = msm6242_read(priv, MSM6242_MINUTE10) * 10 +
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msm6242_read(priv, MSM6242_MINUTE1);
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tm->tm_hour = (msm6242_read(priv, MSM6242_HOUR10) &
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MSM6242_HOUR10_HR_MASK) * 10 +
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msm6242_read(priv, MSM6242_HOUR1);
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tm->tm_mday = msm6242_read(priv, MSM6242_DAY10) * 10 +
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msm6242_read(priv, MSM6242_DAY1);
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tm->tm_wday = msm6242_read(priv, MSM6242_WEEK);
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tm->tm_mon = msm6242_read(priv, MSM6242_MONTH10) * 10 +
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msm6242_read(priv, MSM6242_MONTH1) - 1;
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tm->tm_year = msm6242_read(priv, MSM6242_YEAR10) * 10 +
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msm6242_read(priv, MSM6242_YEAR1);
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if (tm->tm_year <= 69)
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tm->tm_year += 100;
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if (!(msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)) {
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unsigned int pm = msm6242_read(priv, MSM6242_HOUR10) &
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MSM6242_HOUR10_PM;
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if (!pm && tm->tm_hour == 12)
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tm->tm_hour = 0;
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else if (pm && tm->tm_hour != 12)
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tm->tm_hour += 12;
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}
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msm6242_unlock(priv);
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return 0;
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}
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static int msm6242_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct msm6242_priv *priv = dev_get_drvdata(dev);
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msm6242_lock(priv);
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msm6242_write(priv, tm->tm_sec / 10, MSM6242_SECOND10);
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msm6242_write(priv, tm->tm_sec % 10, MSM6242_SECOND1);
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msm6242_write(priv, tm->tm_min / 10, MSM6242_MINUTE10);
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msm6242_write(priv, tm->tm_min % 10, MSM6242_MINUTE1);
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if (msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)
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msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
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else if (tm->tm_hour >= 12)
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msm6242_write(priv, MSM6242_HOUR10_PM + (tm->tm_hour - 12) / 10,
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MSM6242_HOUR10);
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else
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msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
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msm6242_write(priv, tm->tm_hour % 10, MSM6242_HOUR1);
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msm6242_write(priv, tm->tm_mday / 10, MSM6242_DAY10);
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msm6242_write(priv, tm->tm_mday % 10, MSM6242_DAY1);
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if (tm->tm_wday != -1)
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msm6242_write(priv, tm->tm_wday, MSM6242_WEEK);
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msm6242_write(priv, (tm->tm_mon + 1) / 10, MSM6242_MONTH10);
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msm6242_write(priv, (tm->tm_mon + 1) % 10, MSM6242_MONTH1);
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if (tm->tm_year >= 100)
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tm->tm_year -= 100;
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msm6242_write(priv, tm->tm_year / 10, MSM6242_YEAR10);
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msm6242_write(priv, tm->tm_year % 10, MSM6242_YEAR1);
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msm6242_unlock(priv);
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return 0;
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}
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static const struct rtc_class_ops msm6242_rtc_ops = {
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.read_time = msm6242_read_time,
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.set_time = msm6242_set_time,
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};
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static int __init msm6242_rtc_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct msm6242_priv *priv;
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struct rtc_device *rtc;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENODEV;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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if (!priv->regs)
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return -ENOMEM;
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platform_set_drvdata(pdev, priv);
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rtc = devm_rtc_device_register(&pdev->dev, "rtc-msm6242",
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&msm6242_rtc_ops, THIS_MODULE);
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if (IS_ERR(rtc))
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return PTR_ERR(rtc);
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priv->rtc = rtc;
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return 0;
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}
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static struct platform_driver msm6242_rtc_driver = {
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.driver = {
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.name = "rtc-msm6242",
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},
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};
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module_platform_driver_probe(msm6242_rtc_driver, msm6242_rtc_probe);
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MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Oki MSM6242 RTC driver");
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MODULE_ALIAS("platform:rtc-msm6242");
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