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![Biju Das](/assets/img/avatar_default.png)
This patch replaces 'Capture times'->'Total number of ADC data samples' as the former does not really explain much. It also fixes the typo * caliberation->calibration Lastly, as per the coding style /* should be on a separate line. This patch fixes this issue. Reported-by: Pavel Machek <pavel@denx.de> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220718121440.556408-1-biju.das.jz@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
252 lines
6.5 KiB
C
252 lines
6.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas RZ/G2L TSU Thermal Sensor Driver
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*
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* Copyright (C) 2021 Renesas Electronics Corporation
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/math.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include <linux/thermal.h>
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#include <linux/units.h>
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#include "thermal_hwmon.h"
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#define CTEMP_MASK 0xFFF
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/* default calibration values, if FUSE values are missing */
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#define SW_CALIB0_VAL 3148
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#define SW_CALIB1_VAL 503
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/* Register offsets */
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#define TSU_SM 0x00
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#define TSU_ST 0x04
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#define TSU_SAD 0x0C
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#define TSU_SS 0x10
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#define OTPTSUTRIM_REG(n) (0x18 + ((n) * 0x4))
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#define OTPTSUTRIM_EN_MASK BIT(31)
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#define OTPTSUTRIM_MASK GENMASK(11, 0)
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/* Sensor Mode Register(TSU_SM) */
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#define TSU_SM_EN_TS BIT(0)
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#define TSU_SM_ADC_EN_TS BIT(1)
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#define TSU_SM_NORMAL_MODE (TSU_SM_EN_TS | TSU_SM_ADC_EN_TS)
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/* TSU_ST bits */
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#define TSU_ST_START BIT(0)
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#define TSU_SS_CONV_RUNNING BIT(0)
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#define TS_CODE_AVE_SCALE(x) ((x) * 1000000)
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#define MCELSIUS(temp) ((temp) * MILLIDEGREE_PER_DEGREE)
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#define TS_CODE_CAP_TIMES 8 /* Total number of ADC data samples */
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#define RZG2L_THERMAL_GRAN 500 /* milli Celsius */
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#define RZG2L_TSU_SS_TIMEOUT_US 1000
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#define CURVATURE_CORRECTION_CONST 13
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struct rzg2l_thermal_priv {
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struct device *dev;
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void __iomem *base;
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struct thermal_zone_device *zone;
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struct reset_control *rstc;
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u32 calib0, calib1;
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};
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static inline u32 rzg2l_thermal_read(struct rzg2l_thermal_priv *priv, u32 reg)
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{
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return ioread32(priv->base + reg);
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}
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static inline void rzg2l_thermal_write(struct rzg2l_thermal_priv *priv, u32 reg,
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u32 data)
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{
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iowrite32(data, priv->base + reg);
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}
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static int rzg2l_thermal_get_temp(void *devdata, int *temp)
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{
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struct rzg2l_thermal_priv *priv = devdata;
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u32 result = 0, dsensor, ts_code_ave;
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int val, i;
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for (i = 0; i < TS_CODE_CAP_TIMES ; i++) {
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/*
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* TSU repeats measurement at 20 microseconds intervals and
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* automatically updates the results of measurement. As per
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* the HW manual for measuring temperature we need to read 8
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* values consecutively and then take the average.
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* ts_code_ave = (ts_code[0] + ⋯ + ts_code[7]) / 8
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*/
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result += rzg2l_thermal_read(priv, TSU_SAD) & CTEMP_MASK;
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usleep_range(20, 30);
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}
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ts_code_ave = result / TS_CODE_CAP_TIMES;
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/*
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* Calculate actual sensor value by applying curvature correction formula
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* dsensor = ts_code_ave / (1 + ts_code_ave * 0.000013). Here we are doing
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* integer calculation by scaling all the values by 1000000.
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*/
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dsensor = TS_CODE_AVE_SCALE(ts_code_ave) /
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(TS_CODE_AVE_SCALE(1) + (ts_code_ave * CURVATURE_CORRECTION_CONST));
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/*
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* The temperature Tj is calculated by the formula
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* Tj = (dsensor − calib1) * 165/ (calib0 − calib1) − 40
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* where calib0 and calib1 are the calibration values.
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*/
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val = ((dsensor - priv->calib1) * (MCELSIUS(165) /
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(priv->calib0 - priv->calib1))) - MCELSIUS(40);
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*temp = roundup(val, RZG2L_THERMAL_GRAN);
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return 0;
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}
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static const struct thermal_zone_of_device_ops rzg2l_tz_of_ops = {
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.get_temp = rzg2l_thermal_get_temp,
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};
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static int rzg2l_thermal_init(struct rzg2l_thermal_priv *priv)
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{
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u32 reg_val;
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rzg2l_thermal_write(priv, TSU_SM, TSU_SM_NORMAL_MODE);
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rzg2l_thermal_write(priv, TSU_ST, 0);
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/*
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* Before setting the START bit, TSU should be in normal operating
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* mode. As per the HW manual, it will take 60 µs to place the TSU
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* into normal operating mode.
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*/
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usleep_range(60, 80);
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reg_val = rzg2l_thermal_read(priv, TSU_ST);
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reg_val |= TSU_ST_START;
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rzg2l_thermal_write(priv, TSU_ST, reg_val);
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return readl_poll_timeout(priv->base + TSU_SS, reg_val,
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reg_val == TSU_SS_CONV_RUNNING, 50,
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RZG2L_TSU_SS_TIMEOUT_US);
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}
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static void rzg2l_thermal_reset_assert_pm_disable_put(struct platform_device *pdev)
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{
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struct rzg2l_thermal_priv *priv = dev_get_drvdata(&pdev->dev);
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pm_runtime_put(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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reset_control_assert(priv->rstc);
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}
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static int rzg2l_thermal_remove(struct platform_device *pdev)
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{
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struct rzg2l_thermal_priv *priv = dev_get_drvdata(&pdev->dev);
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thermal_remove_hwmon_sysfs(priv->zone);
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rzg2l_thermal_reset_assert_pm_disable_put(pdev);
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return 0;
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}
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static int rzg2l_thermal_probe(struct platform_device *pdev)
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{
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struct thermal_zone_device *zone;
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struct rzg2l_thermal_priv *priv;
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struct device *dev = &pdev->dev;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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priv->dev = dev;
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priv->rstc = devm_reset_control_get_exclusive(dev, NULL);
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if (IS_ERR(priv->rstc))
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return dev_err_probe(dev, PTR_ERR(priv->rstc),
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"failed to get cpg reset");
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ret = reset_control_deassert(priv->rstc);
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if (ret)
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return dev_err_probe(dev, ret, "failed to deassert");
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pm_runtime_enable(dev);
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pm_runtime_get_sync(dev);
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priv->calib0 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0));
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if (priv->calib0 & OTPTSUTRIM_EN_MASK)
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priv->calib0 &= OTPTSUTRIM_MASK;
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else
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priv->calib0 = SW_CALIB0_VAL;
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priv->calib1 = rzg2l_thermal_read(priv, OTPTSUTRIM_REG(1));
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if (priv->calib1 & OTPTSUTRIM_EN_MASK)
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priv->calib1 &= OTPTSUTRIM_MASK;
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else
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priv->calib1 = SW_CALIB1_VAL;
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platform_set_drvdata(pdev, priv);
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ret = rzg2l_thermal_init(priv);
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if (ret) {
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dev_err(dev, "Failed to start TSU");
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goto err;
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}
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zone = devm_thermal_zone_of_sensor_register(dev, 0, priv,
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&rzg2l_tz_of_ops);
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if (IS_ERR(zone)) {
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dev_err(dev, "Can't register thermal zone");
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ret = PTR_ERR(zone);
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goto err;
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}
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priv->zone = zone;
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priv->zone->tzp->no_hwmon = false;
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ret = thermal_add_hwmon_sysfs(priv->zone);
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if (ret)
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goto err;
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dev_dbg(dev, "TSU probed with %s calibration values",
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rzg2l_thermal_read(priv, OTPTSUTRIM_REG(0)) ? "hw" : "sw");
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return 0;
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err:
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rzg2l_thermal_reset_assert_pm_disable_put(pdev);
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return ret;
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}
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static const struct of_device_id rzg2l_thermal_dt_ids[] = {
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{ .compatible = "renesas,rzg2l-tsu", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, rzg2l_thermal_dt_ids);
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static struct platform_driver rzg2l_thermal_driver = {
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.driver = {
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.name = "rzg2l_thermal",
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.of_match_table = rzg2l_thermal_dt_ids,
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},
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.probe = rzg2l_thermal_probe,
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.remove = rzg2l_thermal_remove,
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};
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module_platform_driver(rzg2l_thermal_driver);
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MODULE_DESCRIPTION("Renesas RZ/G2L TSU Thermal Sensor Driver");
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MODULE_AUTHOR("Biju Das <biju.das.jz@bp.renesas.com>");
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MODULE_LICENSE("GPL v2");
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