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![Frans Klaver](/assets/img/avatar_default.png)
Fix a bug where parent device symlinks aren't shown in sysfs. While at it, make use of the default owner value set by mtdcore. Signed-off-by: Frans Klaver <fransklaver@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
220 lines
4.9 KiB
C
220 lines
4.9 KiB
C
/*
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* drivers/mtd/nand/orion_nand.c
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*
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* NAND support for Marvell Orion SoC platforms
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*
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* Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <asm/sizes.h>
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#include <linux/platform_data/mtd-orion_nand.h>
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static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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{
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struct nand_chip *nc = mtd->priv;
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struct orion_nand_data *board = nc->priv;
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u32 offs;
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if (cmd == NAND_CMD_NONE)
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return;
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if (ctrl & NAND_CLE)
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offs = (1 << board->cle);
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else if (ctrl & NAND_ALE)
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offs = (1 << board->ale);
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else
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return;
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if (nc->options & NAND_BUSWIDTH_16)
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offs <<= 1;
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writeb(cmd, nc->IO_ADDR_W + offs);
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}
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static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
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{
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struct nand_chip *chip = mtd->priv;
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void __iomem *io_base = chip->IO_ADDR_R;
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uint64_t *buf64;
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int i = 0;
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while (len && (unsigned long)buf & 7) {
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*buf++ = readb(io_base);
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len--;
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}
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buf64 = (uint64_t *)buf;
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while (i < len/8) {
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/*
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* Since GCC has no proper constraint (PR 43518)
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* force x variable to r2/r3 registers as ldrd instruction
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* requires first register to be even.
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*/
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register uint64_t x asm ("r2");
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asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
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buf64[i++] = x;
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}
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i *= 8;
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while (i < len)
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buf[i++] = readb(io_base);
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}
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static int __init orion_nand_probe(struct platform_device *pdev)
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{
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struct mtd_info *mtd;
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struct mtd_part_parser_data ppdata = {};
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struct nand_chip *nc;
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struct orion_nand_data *board;
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struct resource *res;
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struct clk *clk;
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void __iomem *io_base;
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int ret = 0;
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u32 val = 0;
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nc = devm_kzalloc(&pdev->dev,
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sizeof(struct nand_chip) + sizeof(struct mtd_info),
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GFP_KERNEL);
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if (!nc)
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return -ENOMEM;
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mtd = (struct mtd_info *)(nc + 1);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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io_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(io_base))
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return PTR_ERR(io_base);
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if (pdev->dev.of_node) {
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board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
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GFP_KERNEL);
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if (!board)
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return -ENOMEM;
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if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
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board->cle = (u8)val;
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else
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board->cle = 0;
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if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
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board->ale = (u8)val;
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else
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board->ale = 1;
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if (!of_property_read_u32(pdev->dev.of_node,
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"bank-width", &val))
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board->width = (u8)val * 8;
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else
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board->width = 8;
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if (!of_property_read_u32(pdev->dev.of_node,
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"chip-delay", &val))
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board->chip_delay = (u8)val;
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} else {
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board = dev_get_platdata(&pdev->dev);
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}
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mtd->priv = nc;
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mtd->dev.parent = &pdev->dev;
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nc->priv = board;
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nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
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nc->cmd_ctrl = orion_nand_cmd_ctrl;
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nc->read_buf = orion_nand_read_buf;
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nc->ecc.mode = NAND_ECC_SOFT;
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if (board->chip_delay)
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nc->chip_delay = board->chip_delay;
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WARN(board->width > 16,
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"%d bit bus width out of range",
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board->width);
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if (board->width == 16)
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nc->options |= NAND_BUSWIDTH_16;
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if (board->dev_ready)
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nc->dev_ready = board->dev_ready;
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platform_set_drvdata(pdev, mtd);
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/* Not all platforms can gate the clock, so it is not
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an error if the clock does not exists. */
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clk = clk_get(&pdev->dev, NULL);
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if (!IS_ERR(clk)) {
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clk_prepare_enable(clk);
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clk_put(clk);
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}
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if (nand_scan(mtd, 1)) {
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ret = -ENXIO;
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goto no_dev;
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}
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mtd->name = "orion_nand";
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ppdata.of_node = pdev->dev.of_node;
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ret = mtd_device_parse_register(mtd, NULL, &ppdata,
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board->parts, board->nr_parts);
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if (ret) {
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nand_release(mtd);
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goto no_dev;
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}
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return 0;
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no_dev:
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if (!IS_ERR(clk)) {
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clk_disable_unprepare(clk);
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clk_put(clk);
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}
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return ret;
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}
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static int orion_nand_remove(struct platform_device *pdev)
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{
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struct mtd_info *mtd = platform_get_drvdata(pdev);
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struct clk *clk;
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nand_release(mtd);
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clk = clk_get(&pdev->dev, NULL);
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if (!IS_ERR(clk)) {
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clk_disable_unprepare(clk);
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clk_put(clk);
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}
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id orion_nand_of_match_table[] = {
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{ .compatible = "marvell,orion-nand", },
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{},
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};
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MODULE_DEVICE_TABLE(of, orion_nand_of_match_table);
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#endif
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static struct platform_driver orion_nand_driver = {
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.remove = orion_nand_remove,
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.driver = {
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.name = "orion_nand",
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.of_match_table = of_match_ptr(orion_nand_of_match_table),
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},
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};
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module_platform_driver_probe(orion_nand_driver, orion_nand_probe);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Tzachi Perelstein");
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MODULE_DESCRIPTION("NAND glue for Orion platforms");
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MODULE_ALIAS("platform:orion_nand");
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