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9b79b1cd16
There is no big difference at implementation for .suspend/.resume between DAI driver and Component driver. But because some driver is using DAI version, thus ALSA SoC needs to keep supporting it, hence, framework becoming verbose. If we can switch all DAI driver .suspend/.resume to Component driver, we can remove verbose code from ALSA SoC. Driver is getting its private data via dai->dev. But dai->dev and component->dev are same dev, thus, we can convert these. For same reason, we can convert dai->active to component->active if necessary. This patch moves DAI driver .suspend/.resume to Component driver Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87zhejx7j4.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
352 lines
9.8 KiB
C
352 lines
9.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Socionext UniPhier AIO ALSA driver.
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*
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* Copyright (c) 2016-2018 Socionext Inc.
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*/
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#ifndef SND_UNIPHIER_AIO_H__
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#define SND_UNIPHIER_AIO_H__
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <sound/pcm.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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struct platform_device;
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enum ID_PORT_TYPE {
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PORT_TYPE_UNKNOWN,
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PORT_TYPE_I2S,
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PORT_TYPE_SPDIF,
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PORT_TYPE_EVE,
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PORT_TYPE_CONV,
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};
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enum ID_PORT_DIR {
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PORT_DIR_OUTPUT,
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PORT_DIR_INPUT,
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};
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enum IEC61937_PC {
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IEC61937_PC_AC3 = 0x0001,
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IEC61937_PC_PAUSE = 0x0003,
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IEC61937_PC_MPA = 0x0004,
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IEC61937_PC_MP3 = 0x0005,
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IEC61937_PC_DTS1 = 0x000b,
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IEC61937_PC_DTS2 = 0x000c,
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IEC61937_PC_DTS3 = 0x000d,
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IEC61937_PC_AAC = 0x0007,
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};
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/* IEC61937 Repetition period of data-burst in IEC60958 frames */
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#define IEC61937_FRM_STR_AC3 1536
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#define IEC61937_FRM_STR_MPA 1152
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#define IEC61937_FRM_STR_MP3 1152
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#define IEC61937_FRM_STR_DTS1 512
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#define IEC61937_FRM_STR_DTS2 1024
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#define IEC61937_FRM_STR_DTS3 2048
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#define IEC61937_FRM_STR_AAC 1024
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/* IEC61937 Repetition period of Pause data-burst in IEC60958 frames */
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#define IEC61937_FRM_PAU_AC3 3
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#define IEC61937_FRM_PAU_MPA 32
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#define IEC61937_FRM_PAU_MP3 32
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#define IEC61937_FRM_PAU_DTS1 3
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#define IEC61937_FRM_PAU_DTS2 3
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#define IEC61937_FRM_PAU_DTS3 3
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#define IEC61937_FRM_PAU_AAC 32
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/* IEC61937 Pa and Pb */
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#define IEC61937_HEADER_SIGN 0x1f4e72f8
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#define AUD_HW_PCMIN1 0
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#define AUD_HW_PCMIN2 1
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#define AUD_HW_PCMIN3 2
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#define AUD_HW_IECIN1 3
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#define AUD_HW_DIECIN1 4
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#define AUD_NAME_PCMIN1 "aio-pcmin1"
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#define AUD_NAME_PCMIN2 "aio-pcmin2"
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#define AUD_NAME_PCMIN3 "aio-pcmin3"
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#define AUD_NAME_IECIN1 "aio-iecin1"
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#define AUD_NAME_DIECIN1 "aio-diecin1"
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#define AUD_HW_HPCMOUT1 0
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#define AUD_HW_PCMOUT1 1
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#define AUD_HW_PCMOUT2 2
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#define AUD_HW_PCMOUT3 3
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#define AUD_HW_EPCMOUT1 4
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#define AUD_HW_EPCMOUT2 5
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#define AUD_HW_EPCMOUT3 6
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#define AUD_HW_EPCMOUT6 9
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#define AUD_HW_HIECOUT1 10
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#define AUD_HW_IECOUT1 11
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#define AUD_HW_CMASTER 31
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#define AUD_NAME_HPCMOUT1 "aio-hpcmout1"
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#define AUD_NAME_PCMOUT1 "aio-pcmout1"
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#define AUD_NAME_PCMOUT2 "aio-pcmout2"
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#define AUD_NAME_PCMOUT3 "aio-pcmout3"
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#define AUD_NAME_EPCMOUT1 "aio-epcmout1"
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#define AUD_NAME_EPCMOUT2 "aio-epcmout2"
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#define AUD_NAME_EPCMOUT3 "aio-epcmout3"
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#define AUD_NAME_EPCMOUT6 "aio-epcmout6"
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#define AUD_NAME_HIECOUT1 "aio-hiecout1"
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#define AUD_NAME_IECOUT1 "aio-iecout1"
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#define AUD_NAME_CMASTER "aio-cmaster"
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#define AUD_NAME_HIECCOMPOUT1 "aio-hieccompout1"
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#define AUD_NAME_IECCOMPOUT1 "aio-ieccompout1"
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#define AUD_GNAME_HDMI "aio-hdmi"
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#define AUD_GNAME_LINE "aio-line"
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#define AUD_GNAME_AUX "aio-aux"
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#define AUD_GNAME_IEC "aio-iec"
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#define AUD_CLK_IO 0
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#define AUD_CLK_A1 1
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#define AUD_CLK_F1 2
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#define AUD_CLK_A2 3
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#define AUD_CLK_F2 4
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#define AUD_CLK_A 5
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#define AUD_CLK_F 6
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#define AUD_CLK_APLL 7
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#define AUD_CLK_RX0 8
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#define AUD_CLK_USB0 9
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#define AUD_CLK_HSC0 10
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#define AUD_PLL_A1 0
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#define AUD_PLL_F1 1
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#define AUD_PLL_A2 2
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#define AUD_PLL_F2 3
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#define AUD_PLL_APLL 4
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#define AUD_PLL_RX0 5
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#define AUD_PLL_USB0 6
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#define AUD_PLL_HSC0 7
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#define AUD_PLLDIV_1_2 0
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#define AUD_PLLDIV_1_3 1
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#define AUD_PLLDIV_1_1 2
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#define AUD_PLLDIV_2_3 3
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#define AUD_VOL_INIT 0x4000 /* +0dB */
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#define AUD_VOL_MAX 0xffff /* +6dB */
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#define AUD_VOL_FADE_TIME 20 /* 20ms */
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#define AUD_RING_SIZE (128 * 1024)
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#define AUD_MIN_FRAGMENT 4
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#define AUD_MAX_FRAGMENT 8
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#define AUD_MIN_FRAGMENT_SIZE (4 * 1024)
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#define AUD_MAX_FRAGMENT_SIZE (16 * 1024)
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/* max 5 slots, 10 channels, 2 channel in 1 slot */
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#define AUD_MAX_SLOTSEL 5
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/*
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* This is a selector for virtual register map of AIO.
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*
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* map: Specify the index of virtual register map.
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* hw : Specify the ID of real register map, selector uses this value.
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* A meaning of this value depends specification of SoC.
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*/
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struct uniphier_aio_selector {
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int map;
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int hw;
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};
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/**
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* 'SoftWare MAPping' setting of UniPhier AIO registers.
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*
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* We have to setup 'virtual' register maps to access 'real' registers of AIO.
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* This feature is legacy and meaningless but AIO needs this to work.
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*
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* Each hardware blocks have own virtual register maps as following:
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*
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* Address Virtual Real
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* ------- --------- ---------------
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* 0x12000 DMAC map0 --> [selector] --> DMAC hardware 3
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* 0x12080 DMAC map1 --> [selector] --> DMAC hardware 1
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* ...
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* 0x42000 Port map0 --> [selector] --> Port hardware 1
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* 0x42400 Port map1 --> [selector] --> Port hardware 2
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* ...
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*
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* ch : Input or output channel of DMAC
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* rb : Ring buffer
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* iport: PCM input port
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* iif : Input interface
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* oport: PCM output port
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* oif : Output interface
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* och : Output channel of DMAC for sampling rate converter
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*
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* These are examples for sound data paths:
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*
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* For caputure device:
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* (outer of AIO) -> iport -> iif -> ch -> rb -> (CPU)
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* For playback device:
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* (CPU) -> rb -> ch -> oif -> oport -> (outer of AIO)
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* For sampling rate converter device:
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* (CPU) -> rb -> ch -> oif -> (HW SRC) -> iif -> och -> orb -> (CPU)
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*/
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struct uniphier_aio_swmap {
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int type;
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int dir;
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struct uniphier_aio_selector ch;
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struct uniphier_aio_selector rb;
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struct uniphier_aio_selector iport;
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struct uniphier_aio_selector iif;
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struct uniphier_aio_selector oport;
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struct uniphier_aio_selector oif;
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struct uniphier_aio_selector och;
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};
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struct uniphier_aio_spec {
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const char *name;
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const char *gname;
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struct uniphier_aio_swmap swm;
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};
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struct uniphier_aio_pll {
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bool enable;
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unsigned int freq;
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};
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struct uniphier_aio_chip_spec {
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const struct uniphier_aio_spec *specs;
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int num_specs;
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const struct uniphier_aio_pll *plls;
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int num_plls;
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struct snd_soc_dai_driver *dais;
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int num_dais;
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/* DMA access mode, this is workaround for DMA hungup */
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int addr_ext;
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};
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struct uniphier_aio_sub {
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struct uniphier_aio *aio;
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/* Guard sub->rd_offs and wr_offs from IRQ handler. */
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spinlock_t lock;
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const struct uniphier_aio_swmap *swm;
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const struct uniphier_aio_spec *spec;
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/* For PCM audio */
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struct snd_pcm_substream *substream;
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struct snd_pcm_hw_params params;
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int vol;
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/* For compress audio */
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struct snd_compr_stream *cstream;
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struct snd_compr_params cparams;
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unsigned char *compr_area;
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dma_addr_t compr_addr;
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size_t compr_bytes;
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int pass_through;
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enum IEC61937_PC iec_pc;
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bool iec_header;
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/* Both PCM and compress audio */
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bool use_mmap;
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int setting;
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int running;
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u64 rd_offs;
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u64 wr_offs;
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u32 threshold;
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u64 rd_org;
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u64 wr_org;
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u64 rd_total;
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u64 wr_total;
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};
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struct uniphier_aio {
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struct uniphier_aio_chip *chip;
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struct uniphier_aio_sub sub[2];
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unsigned int fmt;
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/* Set one of AUD_CLK_X */
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int clk_in;
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int clk_out;
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/* Set one of AUD_PLL_X */
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int pll_in;
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int pll_out;
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/* Set one of AUD_PLLDIV_X */
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int plldiv;
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};
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struct uniphier_aio_chip {
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struct platform_device *pdev;
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const struct uniphier_aio_chip_spec *chip_spec;
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struct uniphier_aio *aios;
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int num_aios;
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int num_wup_aios;
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struct uniphier_aio_pll *plls;
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int num_plls;
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struct clk *clk;
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struct reset_control *rst;
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struct regmap *regmap;
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struct regmap *regmap_sg;
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int active;
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};
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static inline struct uniphier_aio *uniphier_priv(struct snd_soc_dai *dai)
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{
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struct uniphier_aio_chip *chip = snd_soc_dai_get_drvdata(dai);
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return &chip->aios[dai->id];
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}
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int uniphier_aiodma_soc_register_platform(struct platform_device *pdev);
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extern const struct snd_compr_ops uniphier_aio_compr_ops;
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int uniphier_aio_dai_probe(struct snd_soc_dai *dai);
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int uniphier_aio_dai_remove(struct snd_soc_dai *dai);
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int uniphier_aio_probe(struct platform_device *pdev);
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int uniphier_aio_remove(struct platform_device *pdev);
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extern const struct snd_soc_dai_ops uniphier_aio_i2s_ops;
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extern const struct snd_soc_dai_ops uniphier_aio_spdif_ops;
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u64 aio_rb_cnt(struct uniphier_aio_sub *sub);
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u64 aio_rbt_cnt_to_end(struct uniphier_aio_sub *sub);
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u64 aio_rb_space(struct uniphier_aio_sub *sub);
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u64 aio_rb_space_to_end(struct uniphier_aio_sub *sub);
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void aio_iecout_set_enable(struct uniphier_aio_chip *chip, bool enable);
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int aio_chip_set_pll(struct uniphier_aio_chip *chip, int pll_id,
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unsigned int freq);
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void aio_chip_init(struct uniphier_aio_chip *chip);
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int aio_init(struct uniphier_aio_sub *sub);
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void aio_port_reset(struct uniphier_aio_sub *sub);
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int aio_port_set_param(struct uniphier_aio_sub *sub, int pass_through,
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const struct snd_pcm_hw_params *params);
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void aio_port_set_enable(struct uniphier_aio_sub *sub, int enable);
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int aio_port_get_volume(struct uniphier_aio_sub *sub);
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void aio_port_set_volume(struct uniphier_aio_sub *sub, int vol);
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int aio_if_set_param(struct uniphier_aio_sub *sub, int pass_through);
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int aio_oport_set_stream_type(struct uniphier_aio_sub *sub,
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enum IEC61937_PC pc);
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void aio_src_reset(struct uniphier_aio_sub *sub);
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int aio_src_set_param(struct uniphier_aio_sub *sub,
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const struct snd_pcm_hw_params *params);
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int aio_srcif_set_param(struct uniphier_aio_sub *sub);
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int aio_srcch_set_param(struct uniphier_aio_sub *sub);
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void aio_srcch_set_enable(struct uniphier_aio_sub *sub, int enable);
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int aiodma_ch_set_param(struct uniphier_aio_sub *sub);
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void aiodma_ch_set_enable(struct uniphier_aio_sub *sub, int enable);
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int aiodma_rb_set_threshold(struct uniphier_aio_sub *sub, u64 size, u32 th);
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int aiodma_rb_set_buffer(struct uniphier_aio_sub *sub, u64 start, u64 end,
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int period);
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void aiodma_rb_sync(struct uniphier_aio_sub *sub, u64 start, u64 size,
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int period);
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bool aiodma_rb_is_irq(struct uniphier_aio_sub *sub);
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void aiodma_rb_clear_irq(struct uniphier_aio_sub *sub);
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#endif /* SND_UNIPHIER_AIO_H__ */
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