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d5aabbcaee
Board-related updates. This branch is getting smaller and smaller, which is the whole idea so that's reassuring. Right now by far most of the code is related to shmobile updates, and they are now switching over to removal of board code and migration to multiplatform, so we'll see their board code base shrink in the near future too, I hope. In addition to that is some defconfig updates, some display updates for OMAP and a bit of new board support for Rockchip boards. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJSgBsmAAoJEIwa5zzehBx3m3oP/ingw9VE69O3GLjd2zWI35HJ +NuFmwlWFj+1XLysfCxHJn3rvkMJKM33ZcP6FkgJGMHfQRRBmrC0REG/nQq59riE c7R+Jguw044kAGH3evg4kCJ3gI+WD+H+juKf4IQ9bYDaneZGN9f0hkuzLRbmqwZP RIDa+q+Oo6Q3pcTUvkz2lMV6q7Ydb5H49suyPN+9muJ1wVYjFR+XuvnYzy/PO2lF kyIN2fijQN278QjM6eZEtsFoB7L7NmuZr8ZBTkekHSfybqIsb59JEqZER7huJSdR fEk0VQ/A6M2LQSRTL+UrCadFYaxDnW8wjxbpLUikhg7ONnrCBSGvVj4nFiEKAFdE R49YZ2hqhrXjie1kGoKuXGmxGG/7ODJWmWDgnIXx0daSOgPUomlO8YKtGeBO1/Zf 6wsvAjiukcLV10JEF/rCslTEA/Ck5dJZjV6S/8hSy1N+CF4qZflSmXG0gb9tB+nv ztRN9gTlJSr/MpIE3jpbPFxNwef+UPW/R8fnO7fdnzPeOpwTDzZ1ydArC0IIpmgt Ngum5iyP4qcwZ91hWXhdAu3ZGeHWZ5tox1W/DMjkyTxCEDUUdtfkChOGf/Wmjg7z Rl5nyH2Y4xT0+Otn/0LIqKvEh1JwwX9FlIqkJI4IMrnYJwHQ4oBvOAGskW1ZsFPQ 0OBbAAHS1tio3ZywNMIQ =ZYOa -----END PGP SIGNATURE----- Merge tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC board updates from Olof Johansson: "Board-related updates. This branch is getting smaller and smaller, which is the whole idea so that's reassuring. Right now by far most of the code is related to shmobile updates, and they are now switching over to removal of board code and migration to multiplatform, so we'll see their board code base shrink in the near future too, I hope. In addition to that is some defconfig updates, some display updates for OMAP and a bit of new board support for Rockchip boards" * tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (56 commits) ARM: rockchip: add support for rk3188 and Radxa Rock board ARM: rockchip: add dts for bqcurie2 tablet ARM: rockchip: enable arm-global-timer ARM: rockchip: move shared dt properties to common source file ARM: OMAP2+: display: Create omap_vout device inside omap_display_init ARM: OMAP2+: display: Create omapvrfb and omapfb devices inside omap_display_init ARM: OMAP2+: display: Create omapdrm device inside omap_display_init ARM: OMAP2+: drm: Don't build device for DMM ARM: tegra: defconfig updates RX-51: Add support for OMAP3 ROM Random Number Generator ARM: OMAP3: RX-51: ARM errata 430973 workaround ARM: OMAP3: Add secure function omap_smc3() which calling instruction smc #1 ARM: shmobile: marzen: enable INTC IRQ ARM: shmobile: bockw: add SMSC support on reference ARM: shmobile: Use SMP on Koelsch ARM: shmobile: Remove KZM9D reference DTS ARM: shmobile: Let KZM9D multiplatform boot with KZM9D DTB ARM: shmobile: Remove non-multiplatform KZM9D reference support ARM: shmobile: Use KZM9D without reference for multiplatform ARM: shmobile: Sync KZM9D DTS with KZM9D reference DTS ...
81 lines
2.6 KiB
C
81 lines
2.6 KiB
C
/*
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* omap-secure.h: OMAP Secure infrastructure header.
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*
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* Copyright (C) 2011 Texas Instruments, Inc.
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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* Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
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* Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef OMAP_ARCH_OMAP_SECURE_H
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#define OMAP_ARCH_OMAP_SECURE_H
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/* Monitor error code */
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#define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE
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#define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF
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/* HAL API error codes */
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#define API_HAL_RET_VALUE_OK 0x00
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#define API_HAL_RET_VALUE_FAIL 0x01
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/* Secure HAL API flags */
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#define FLAG_START_CRITICAL 0x4
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#define FLAG_IRQFIQ_MASK 0x3
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#define FLAG_IRQ_ENABLE 0x2
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#define FLAG_FIQ_ENABLE 0x1
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#define NO_FLAG 0x0
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/* Maximum Secure memory storage size */
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#define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
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/* Secure low power HAL API index */
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#define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
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#define OMAP4_HAL_SAVEHW_INDEX 0x1b
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#define OMAP4_HAL_SAVEALL_INDEX 0x1c
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#define OMAP4_HAL_SAVEGIC_INDEX 0x1d
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/* Secure Monitor mode APIs */
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#define OMAP4_MON_SCU_PWR_INDEX 0x108
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#define OMAP4_MON_L2X0_DBG_CTRL_INDEX 0x100
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#define OMAP4_MON_L2X0_CTRL_INDEX 0x102
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#define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109
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#define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113
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#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
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/* Secure PPA(Primary Protected Application) APIs */
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#define OMAP4_PPA_L2_POR_INDEX 0x23
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#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
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/* Secure RX-51 PPA (Primary Protected Application) APIs */
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#define RX51_PPA_HWRNG 29
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#define RX51_PPA_L2_INVAL 40
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#define RX51_PPA_WRITE_ACR 42
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#ifndef __ASSEMBLER__
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extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
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u32 arg1, u32 arg2, u32 arg3, u32 arg4);
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extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
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extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
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extern phys_addr_t omap_secure_ram_mempool_base(void);
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extern int omap_secure_ram_reserve_memblock(void);
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extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
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u32 arg1, u32 arg2, u32 arg3, u32 arg4);
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extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
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extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
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#ifdef CONFIG_OMAP4_ERRATA_I688
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extern int omap_barrier_reserve_memblock(void);
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#else
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static inline void omap_barrier_reserve_memblock(void)
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{ }
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#endif
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void set_cntfreq(void);
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#endif /* __ASSEMBLER__ */
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#endif /* OMAP_ARCH_OMAP_SECURE_H */
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