Chen-Yu Tsai f0152c58c6 phy: sun4i-usb: Support secondary clock for HSIC PHY ... On the Allwinner A83T SoC, the last USB PHY is an HSIC PHY. It requires two clocks instead of one. On all Allwinner SoCs that share the common USB PHY design supported by the phy-sun4i-usb driver, the first PHY is always tied to OTG, and there is at most one HSIC PHY, typically the last. In this patch we take advantage of these known constraints and store an index in the compatible-string-related config structure describing which PHY is HSIC, needing the extra hsic_12M clock. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>		2017-08-22 10:11:17 +05:30
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phy-sun4i-usb.c	phy: sun4i-usb: Support secondary clock for HSIC PHY	2017-08-22 10:11:17 +05:30
phy-sun9i-usb.c