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![Takashi Iwai](/assets/img/avatar_default.png)
It's been reported that the recent fix for skipping the
component-binding with D-GPU caused a regression on some systems; it
resulted in the completely missing component binding with i915 GPU.
The problem was the use of pci_get_class() function. It matches with
the full PCI class bits, while we want to match only partially the PCI
base class bits. So, when a system has an i915 graphics device with
the PCI class 0380, it won't hit because we're looking for only the
PCI class 0300.
This patch fixes i915_gfx_present() to look up each PCI device and
match with PCI base class explicitly instead of pci_get_class().
Fixes: c9db8a30d9
("ALSA: hda/i915 - skip acomp init if no matching display")
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Tested-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Cc: <stable@vger.kernel.org>
Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1200611
Link: https://lore.kernel.org/r/87bkunztec.wl-tiwai@suse.de
Link: https://lore.kernel.org/r/20220621120044.11573-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
179 lines
4.4 KiB
C
179 lines
4.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* hdac_i915.c - routines for sync between HD-A core and i915 display driver
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <sound/core.h>
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#include <sound/hdaudio.h>
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#include <sound/hda_i915.h>
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#include <sound/hda_register.h>
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#define IS_HSW_CONTROLLER(pci) (((pci)->device == 0x0a0c) || \
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((pci)->device == 0x0c0c) || \
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((pci)->device == 0x0d0c) || \
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((pci)->device == 0x160c))
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/**
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* snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
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* @bus: HDA core bus
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*
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* Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
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* depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
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* are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
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* BCLK = CDCLK * M / N
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* The values will be lost when the display power well is disabled and need to
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* be restored to avoid abnormal playback speed.
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*
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* Call this function at initializing and changing power well, as well as
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* at ELD notifier for the hotplug.
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*/
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void snd_hdac_i915_set_bclk(struct hdac_bus *bus)
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{
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struct drm_audio_component *acomp = bus->audio_component;
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struct pci_dev *pci = to_pci_dev(bus->dev);
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int cdclk_freq;
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unsigned int bclk_m, bclk_n;
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if (!acomp || !acomp->ops || !acomp->ops->get_cdclk_freq)
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return; /* only for i915 binding */
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if (!IS_HSW_CONTROLLER(pci))
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return; /* only HSW/BDW */
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cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev);
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switch (cdclk_freq) {
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case 337500:
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bclk_m = 16;
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bclk_n = 225;
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break;
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case 450000:
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default: /* default CDCLK 450MHz */
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bclk_m = 4;
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bclk_n = 75;
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break;
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case 540000:
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bclk_m = 4;
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bclk_n = 90;
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break;
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case 675000:
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bclk_m = 8;
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bclk_n = 225;
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break;
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}
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snd_hdac_chip_writew(bus, HSW_EM4, bclk_m);
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snd_hdac_chip_writew(bus, HSW_EM5, bclk_n);
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}
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EXPORT_SYMBOL_GPL(snd_hdac_i915_set_bclk);
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/* returns true if the devices can be connected for audio */
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static bool connectivity_check(struct pci_dev *i915, struct pci_dev *hdac)
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{
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struct pci_bus *bus_a = i915->bus, *bus_b = hdac->bus;
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/* directly connected on the same bus */
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if (bus_a == bus_b)
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return true;
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/*
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* on i915 discrete GPUs with embedded HDA audio, the two
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* devices are connected via 2nd level PCI bridge
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*/
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bus_a = bus_a->parent;
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bus_b = bus_b->parent;
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if (!bus_a || !bus_b)
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return false;
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bus_a = bus_a->parent;
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bus_b = bus_b->parent;
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if (bus_a && bus_a == bus_b)
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return true;
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return false;
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}
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static int i915_component_master_match(struct device *dev, int subcomponent,
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void *data)
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{
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struct pci_dev *hdac_pci, *i915_pci;
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struct hdac_bus *bus = data;
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if (!dev_is_pci(dev))
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return 0;
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hdac_pci = to_pci_dev(bus->dev);
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i915_pci = to_pci_dev(dev);
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if (!strcmp(dev->driver->name, "i915") &&
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subcomponent == I915_COMPONENT_AUDIO &&
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connectivity_check(i915_pci, hdac_pci))
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return 1;
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return 0;
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}
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/* check whether Intel graphics is present and reachable */
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static int i915_gfx_present(struct pci_dev *hdac_pci)
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{
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struct pci_dev *display_dev = NULL;
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for_each_pci_dev(display_dev) {
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if (display_dev->vendor == PCI_VENDOR_ID_INTEL &&
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(display_dev->class >> 16) == PCI_BASE_CLASS_DISPLAY &&
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connectivity_check(display_dev, hdac_pci)) {
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pci_dev_put(display_dev);
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return true;
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}
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}
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return false;
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}
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/**
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* snd_hdac_i915_init - Initialize i915 audio component
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* @bus: HDA core bus
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*
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* This function is supposed to be used only by a HD-audio controller
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* driver that needs the interaction with i915 graphics.
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*
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* This function initializes and sets up the audio component to communicate
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* with i915 graphics driver.
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*
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* Returns zero for success or a negative error code.
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*/
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int snd_hdac_i915_init(struct hdac_bus *bus)
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{
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struct drm_audio_component *acomp;
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int err;
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if (!i915_gfx_present(to_pci_dev(bus->dev)))
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return -ENODEV;
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err = snd_hdac_acomp_init(bus, NULL,
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i915_component_master_match,
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sizeof(struct i915_audio_component) - sizeof(*acomp));
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if (err < 0)
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return err;
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acomp = bus->audio_component;
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if (!acomp)
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return -ENODEV;
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if (!acomp->ops) {
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if (!IS_ENABLED(CONFIG_MODULES) ||
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!request_module("i915")) {
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/* 60s timeout */
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wait_for_completion_killable_timeout(&acomp->master_bind_complete,
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msecs_to_jiffies(60 * 1000));
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}
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}
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if (!acomp->ops) {
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dev_info(bus->dev, "couldn't bind with audio component\n");
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snd_hdac_acomp_exit(bus);
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return -ENODEV;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_i915_init);
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