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992040f540
Signed-off-by: Karen Xie <kxie@chelsio.com> Reviewed-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
309 lines
8 KiB
C
309 lines
8 KiB
C
/*
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* cxgb3i_ddp.h: Chelsio S3xx iSCSI DDP Manager.
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*
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* Copyright (c) 2008 Chelsio Communications, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*
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* Written by: Karen Xie (kxie@chelsio.com)
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*/
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#ifndef __CXGB3I_ULP2_DDP_H__
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#define __CXGB3I_ULP2_DDP_H__
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#include <linux/vmalloc.h>
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/**
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* struct cxgb3i_tag_format - cxgb3i ulp tag format for an iscsi entity
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*
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* @sw_bits: # of bits used by iscsi software layer
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* @rsvd_bits: # of bits used by h/w
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* @rsvd_shift: h/w bits shift left
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* @rsvd_mask: reserved bit mask
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*/
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struct cxgb3i_tag_format {
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unsigned char sw_bits;
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unsigned char rsvd_bits;
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unsigned char rsvd_shift;
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unsigned char filler[1];
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u32 rsvd_mask;
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};
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/**
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* struct cxgb3i_gather_list - cxgb3i direct data placement memory
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*
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* @tag: ddp tag
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* @length: total data buffer length
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* @offset: initial offset to the 1st page
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* @nelem: # of pages
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* @pages: page pointers
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* @phys_addr: physical address
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*/
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struct cxgb3i_gather_list {
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u32 tag;
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unsigned int length;
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unsigned int offset;
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unsigned int nelem;
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struct page **pages;
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dma_addr_t phys_addr[0];
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};
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/**
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* struct cxgb3i_ddp_info - cxgb3i direct data placement for pdu payload
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*
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* @list: list head to link elements
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* @tdev: pointer to t3cdev used by cxgb3 driver
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* @max_txsz: max tx packet size for ddp
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* @max_rxsz: max rx packet size for ddp
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* @llimit: lower bound of the page pod memory
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* @ulimit: upper bound of the page pod memory
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* @nppods: # of page pod entries
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* @idx_last: page pod entry last used
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* @idx_bits: # of bits the pagepod index would take
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* @idx_mask: pagepod index mask
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* @rsvd_tag_mask: tag mask
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* @map_lock: lock to synchonize access to the page pod map
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* @gl_map: ddp memory gather list
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* @gl_skb: skb used to program the pagepod
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*/
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struct cxgb3i_ddp_info {
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struct list_head list;
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struct t3cdev *tdev;
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struct pci_dev *pdev;
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unsigned int max_txsz;
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unsigned int max_rxsz;
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unsigned int llimit;
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unsigned int ulimit;
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unsigned int nppods;
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unsigned int idx_last;
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unsigned char idx_bits;
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unsigned char filler[3];
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u32 idx_mask;
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u32 rsvd_tag_mask;
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spinlock_t map_lock;
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struct cxgb3i_gather_list **gl_map;
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struct sk_buff **gl_skb;
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};
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#define ISCSI_PDU_NONPAYLOAD_LEN 312 /* bhs(48) + ahs(256) + digest(8) */
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#define ULP2_MAX_PKT_SIZE 16224
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#define ULP2_MAX_PDU_PAYLOAD (ULP2_MAX_PKT_SIZE - ISCSI_PDU_NONPAYLOAD_LEN)
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#define PPOD_PAGES_MAX 4
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#define PPOD_PAGES_SHIFT 2 /* 4 pages per pod */
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/*
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* struct pagepod_hdr, pagepod - pagepod format
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*/
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struct pagepod_hdr {
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u32 vld_tid;
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u32 pgsz_tag_clr;
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u32 maxoffset;
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u32 pgoffset;
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u64 rsvd;
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};
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struct pagepod {
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struct pagepod_hdr hdr;
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u64 addr[PPOD_PAGES_MAX + 1];
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};
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#define PPOD_SIZE sizeof(struct pagepod) /* 64 */
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#define PPOD_SIZE_SHIFT 6
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#define PPOD_COLOR_SHIFT 0
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#define PPOD_COLOR_SIZE 6
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#define PPOD_COLOR_MASK ((1 << PPOD_COLOR_SIZE) - 1)
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#define PPOD_IDX_SHIFT PPOD_COLOR_SIZE
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#define PPOD_IDX_MAX_SIZE 24
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#define S_PPOD_TID 0
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#define M_PPOD_TID 0xFFFFFF
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#define V_PPOD_TID(x) ((x) << S_PPOD_TID)
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#define S_PPOD_VALID 24
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#define V_PPOD_VALID(x) ((x) << S_PPOD_VALID)
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#define F_PPOD_VALID V_PPOD_VALID(1U)
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#define S_PPOD_COLOR 0
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#define M_PPOD_COLOR 0x3F
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#define V_PPOD_COLOR(x) ((x) << S_PPOD_COLOR)
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#define S_PPOD_TAG 6
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#define M_PPOD_TAG 0xFFFFFF
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#define V_PPOD_TAG(x) ((x) << S_PPOD_TAG)
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#define S_PPOD_PGSZ 30
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#define M_PPOD_PGSZ 0x3
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#define V_PPOD_PGSZ(x) ((x) << S_PPOD_PGSZ)
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/*
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* large memory chunk allocation/release
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* use vmalloc() if kmalloc() fails
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*/
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static inline void *cxgb3i_alloc_big_mem(unsigned int size,
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gfp_t gfp)
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{
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void *p = kmalloc(size, gfp);
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if (!p)
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p = vmalloc(size);
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if (p)
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memset(p, 0, size);
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return p;
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}
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static inline void cxgb3i_free_big_mem(void *addr)
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{
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if (is_vmalloc_addr(addr))
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vfree(addr);
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else
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kfree(addr);
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}
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/*
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* cxgb3i ddp tag are 32 bits, it consists of reserved bits used by h/w and
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* non-reserved bits that can be used by the iscsi s/w.
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* The reserved bits are identified by the rsvd_bits and rsvd_shift fields
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* in struct cxgb3i_tag_format.
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*
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* The upper most reserved bit can be used to check if a tag is ddp tag or not:
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* if the bit is 0, the tag is a valid ddp tag
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*/
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/**
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* cxgb3i_is_ddp_tag - check if a given tag is a hw/ddp tag
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* @tformat: tag format information
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* @tag: tag to be checked
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*
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* return true if the tag is a ddp tag, false otherwise.
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*/
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static inline int cxgb3i_is_ddp_tag(struct cxgb3i_tag_format *tformat, u32 tag)
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{
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return !(tag & (1 << (tformat->rsvd_bits + tformat->rsvd_shift - 1)));
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}
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/**
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* cxgb3i_sw_tag_usable - check if a given s/w tag has enough bits left for
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* the reserved/hw bits
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* @tformat: tag format information
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* @sw_tag: s/w tag to be checked
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*
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* return true if the tag is a ddp tag, false otherwise.
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*/
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static inline int cxgb3i_sw_tag_usable(struct cxgb3i_tag_format *tformat,
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u32 sw_tag)
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{
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sw_tag >>= (32 - tformat->rsvd_bits);
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return !sw_tag;
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}
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/**
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* cxgb3i_set_non_ddp_tag - mark a given s/w tag as an invalid ddp tag
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* @tformat: tag format information
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* @sw_tag: s/w tag to be checked
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*
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* insert 1 at the upper most reserved bit to mark it as an invalid ddp tag.
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*/
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static inline u32 cxgb3i_set_non_ddp_tag(struct cxgb3i_tag_format *tformat,
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u32 sw_tag)
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{
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unsigned char shift = tformat->rsvd_bits + tformat->rsvd_shift - 1;
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u32 mask = (1 << shift) - 1;
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if (sw_tag && (sw_tag & ~mask)) {
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u32 v1 = sw_tag & ((1 << shift) - 1);
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u32 v2 = (sw_tag >> (shift - 1)) << shift;
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return v2 | v1 | 1 << shift;
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}
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return sw_tag | 1 << shift;
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}
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/**
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* cxgb3i_ddp_tag_base - shift the s/w tag bits so that reserved bits are not
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* used.
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* @tformat: tag format information
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* @sw_tag: s/w tag to be checked
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*/
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static inline u32 cxgb3i_ddp_tag_base(struct cxgb3i_tag_format *tformat,
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u32 sw_tag)
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{
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u32 mask = (1 << tformat->rsvd_shift) - 1;
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if (sw_tag && (sw_tag & ~mask)) {
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u32 v1 = sw_tag & mask;
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u32 v2 = sw_tag >> tformat->rsvd_shift;
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v2 <<= tformat->rsvd_shift + tformat->rsvd_bits;
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return v2 | v1;
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}
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return sw_tag;
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}
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/**
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* cxgb3i_tag_rsvd_bits - get the reserved bits used by the h/w
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* @tformat: tag format information
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* @tag: tag to be checked
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*
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* return the reserved bits in the tag
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*/
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static inline u32 cxgb3i_tag_rsvd_bits(struct cxgb3i_tag_format *tformat,
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u32 tag)
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{
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if (cxgb3i_is_ddp_tag(tformat, tag))
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return (tag >> tformat->rsvd_shift) & tformat->rsvd_mask;
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return 0;
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}
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/**
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* cxgb3i_tag_nonrsvd_bits - get the non-reserved bits used by the s/w
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* @tformat: tag format information
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* @tag: tag to be checked
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*
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* return the non-reserved bits in the tag.
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*/
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static inline u32 cxgb3i_tag_nonrsvd_bits(struct cxgb3i_tag_format *tformat,
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u32 tag)
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{
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unsigned char shift = tformat->rsvd_bits + tformat->rsvd_shift - 1;
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u32 v1, v2;
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if (cxgb3i_is_ddp_tag(tformat, tag)) {
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v1 = tag & ((1 << tformat->rsvd_shift) - 1);
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v2 = (tag >> (shift + 1)) << tformat->rsvd_shift;
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} else {
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u32 mask = (1 << shift) - 1;
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tag &= ~(1 << shift);
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v1 = tag & mask;
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v2 = (tag >> 1) & ~mask;
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}
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return v1 | v2;
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}
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int cxgb3i_ddp_tag_reserve(struct t3cdev *, unsigned int tid,
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struct cxgb3i_tag_format *, u32 *tag,
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struct cxgb3i_gather_list *, gfp_t gfp);
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void cxgb3i_ddp_tag_release(struct t3cdev *, u32 tag);
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struct cxgb3i_gather_list *cxgb3i_ddp_make_gl(unsigned int xferlen,
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struct scatterlist *sgl,
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unsigned int sgcnt,
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struct pci_dev *pdev,
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gfp_t gfp);
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void cxgb3i_ddp_release_gl(struct cxgb3i_gather_list *gl,
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struct pci_dev *pdev);
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int cxgb3i_setup_conn_host_pagesize(struct t3cdev *, unsigned int tid,
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int reply);
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int cxgb3i_setup_conn_pagesize(struct t3cdev *, unsigned int tid, int reply,
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unsigned long pgsz);
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int cxgb3i_setup_conn_digest(struct t3cdev *, unsigned int tid,
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int hcrc, int dcrc, int reply);
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int cxgb3i_ddp_find_page_index(unsigned long pgsz);
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int cxgb3i_adapter_ddp_init(struct t3cdev *, struct cxgb3i_tag_format *,
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unsigned int *txsz, unsigned int *rxsz);
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void cxgb3i_adapter_ddp_cleanup(struct t3cdev *);
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#endif
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