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![Alexander Shiyan](/assets/img/avatar_default.png)
Using a single definition for the physical and virtual address register for all variants boards clps711x. This patch also includes the use of a single function clps_read/write in some units. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
432 lines
10 KiB
C
432 lines
10 KiB
C
/*
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* linux/drivers/video/clps711xfb.c
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*
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* Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Framebuffer driver for the CLPS7111 and EP7212 processors.
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*/
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/proc_fs.h>
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#include <linux/delay.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <linux/uaccess.h>
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#include <mach/syspld.h>
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struct fb_info *cfb;
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#define CMAP_MAX_SIZE 16
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/*
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* LCD AC Prescale. This comes from the LCD panel manufacturers specifications.
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* This determines how many clocks + 1 of CL1 before the M signal toggles.
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* The number of lines on the display must not be divisible by this number.
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*/
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static unsigned int lcd_ac_prescale = 13;
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/*
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* Set a single color register. Return != 0 for invalid regno.
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*/
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static int
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clps7111fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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u_int transp, struct fb_info *info)
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{
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unsigned int level, mask, shift, pal;
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if (regno >= (1 << info->var.bits_per_pixel))
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return 1;
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/* gray = 0.30*R + 0.58*G + 0.11*B */
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level = (red * 77 + green * 151 + blue * 28) >> 20;
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/*
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* On an LCD, a high value is dark, while a low value is light.
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* So we invert the level.
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*
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* This isn't true on all machines, so we only do it on EDB7211.
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* --rmk
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*/
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if (machine_is_edb7211()) {
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level = 15 - level;
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}
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shift = 4 * (regno & 7);
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level <<= shift;
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mask = 15 << shift;
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level &= mask;
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regno = regno < 8 ? PALLSW : PALMSW;
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pal = clps_readl(regno);
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pal = (pal & ~mask) | level;
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clps_writel(pal, regno);
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return 0;
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}
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/*
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* Validate the purposed mode.
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*/
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static int
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clps7111fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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var->transp.msb_right = 0;
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var->transp.offset = 0;
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var->transp.length = 0;
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var->red.msb_right = 0;
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var->red.offset = 0;
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var->red.length = var->bits_per_pixel;
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var->green = var->red;
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var->blue = var->red;
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if (var->bits_per_pixel > 4)
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return -EINVAL;
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return 0;
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}
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/*
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* Set the hardware state.
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*/
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static int
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clps7111fb_set_par(struct fb_info *info)
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{
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unsigned int lcdcon, syscon, pixclock;
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switch (info->var.bits_per_pixel) {
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case 1:
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info->fix.visual = FB_VISUAL_MONO01;
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break;
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case 2:
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
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break;
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case 4:
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
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break;
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}
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info->fix.line_length = info->var.xres_virtual * info->var.bits_per_pixel / 8;
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lcdcon = (info->var.xres_virtual * info->var.yres_virtual * info->var.bits_per_pixel) / 128 - 1;
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lcdcon |= ((info->var.xres_virtual / 16) - 1) << 13;
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lcdcon |= lcd_ac_prescale << 25;
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/*
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* Calculate pixel prescale value from the pixclock. This is:
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* 36.864MHz / pixclock_mhz - 1.
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* However, pixclock is in picoseconds, so this ends up being:
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* 36864000 * pixclock_ps / 10^12 - 1
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* and this will overflow the 32-bit math. We perform this as
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* (9 * 4096000 == 36864000):
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* pixclock_ps * 9 * (4096000 / 10^12) - 1
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*/
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pixclock = 9 * info->var.pixclock / 244140 - 1;
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lcdcon |= pixclock << 19;
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if (info->var.bits_per_pixel == 4)
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lcdcon |= LCDCON_GSMD;
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if (info->var.bits_per_pixel >= 2)
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lcdcon |= LCDCON_GSEN;
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/*
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* LCDCON must only be changed while the LCD is disabled
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*/
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syscon = clps_readl(SYSCON1);
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clps_writel(syscon & ~SYSCON1_LCDEN, SYSCON1);
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clps_writel(lcdcon, LCDCON);
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clps_writel(syscon | SYSCON1_LCDEN, SYSCON1);
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return 0;
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}
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static int clps7111fb_blank(int blank, struct fb_info *info)
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{
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if (blank) {
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if (machine_is_edb7211()) {
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/* Turn off the LCD backlight. */
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clps_writeb(clps_readb(PDDR) & ~EDB_PD3_LCDBL, PDDR);
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/* Power off the LCD DC-DC converter. */
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clps_writeb(clps_readb(PDDR) & ~EDB_PD1_LCD_DC_DC_EN, PDDR);
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/* Delay for a little while (half a second). */
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udelay(100);
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/* Power off the LCD panel. */
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clps_writeb(clps_readb(PDDR) & ~EDB_PD2_LCDEN, PDDR);
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/* Power off the LCD controller. */
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clps_writel(clps_readl(SYSCON1) & ~SYSCON1_LCDEN,
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SYSCON1);
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}
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} else {
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if (machine_is_edb7211()) {
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/* Power up the LCD controller. */
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clps_writel(clps_readl(SYSCON1) | SYSCON1_LCDEN,
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SYSCON1);
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/* Power up the LCD panel. */
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clps_writeb(clps_readb(PDDR) | EDB_PD2_LCDEN, PDDR);
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/* Delay for a little while. */
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udelay(100);
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/* Power up the LCD DC-DC converter. */
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clps_writeb(clps_readb(PDDR) | EDB_PD1_LCD_DC_DC_EN,
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PDDR);
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/* Turn on the LCD backlight. */
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clps_writeb(clps_readb(PDDR) | EDB_PD3_LCDBL, PDDR);
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}
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}
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return 0;
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}
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static struct fb_ops clps7111fb_ops = {
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.owner = THIS_MODULE,
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.fb_check_var = clps7111fb_check_var,
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.fb_set_par = clps7111fb_set_par,
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.fb_setcolreg = clps7111fb_setcolreg,
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.fb_blank = clps7111fb_blank,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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};
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static int backlight_proc_show(struct seq_file *m, void *v)
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{
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if (machine_is_edb7211()) {
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seq_printf(m, "%d\n",
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(clps_readb(PDDR) & EDB_PD3_LCDBL) ? 1 : 0);
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}
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return 0;
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}
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static int backlight_proc_open(struct inode *inode, struct file *file)
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{
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return single_open(file, backlight_proc_show, NULL);
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}
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static ssize_t backlight_proc_write(struct file *file, const char *buffer,
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size_t count, loff_t *pos)
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{
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unsigned char char_value;
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int value;
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if (count < 1) {
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return -EINVAL;
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}
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if (copy_from_user(&char_value, buffer, 1))
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return -EFAULT;
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value = char_value - '0';
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if (machine_is_edb7211()) {
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unsigned char port_d;
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port_d = clps_readb(PDDR);
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if (value) {
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port_d |= EDB_PD3_LCDBL;
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} else {
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port_d &= ~EDB_PD3_LCDBL;
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}
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clps_writeb(port_d, PDDR);
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}
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return count;
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}
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static const struct file_operations backlight_proc_fops = {
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.owner = THIS_MODULE,
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.open = backlight_proc_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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.write = backlight_proc_write,
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};
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static void __init clps711x_guess_lcd_params(struct fb_info *info)
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{
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unsigned int lcdcon, syscon, size;
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unsigned long phys_base = PAGE_OFFSET;
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void *virt_base = (void *)PAGE_OFFSET;
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info->var.xres_virtual = 640;
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info->var.yres_virtual = 240;
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info->var.bits_per_pixel = 4;
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info->var.activate = FB_ACTIVATE_NOW;
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info->var.height = -1;
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info->var.width = -1;
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info->var.pixclock = 93006; /* 10.752MHz pixel clock */
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/*
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* If the LCD controller is already running, decode the values
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* in LCDCON to xres/yres/bpp/pixclock/acprescale
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*/
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syscon = clps_readl(SYSCON1);
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if (syscon & SYSCON1_LCDEN) {
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lcdcon = clps_readl(LCDCON);
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/*
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* Decode GSMD and GSEN bits to bits per pixel
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*/
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switch (lcdcon & (LCDCON_GSMD | LCDCON_GSEN)) {
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case LCDCON_GSMD | LCDCON_GSEN:
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info->var.bits_per_pixel = 4;
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break;
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case LCDCON_GSEN:
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info->var.bits_per_pixel = 2;
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break;
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default:
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info->var.bits_per_pixel = 1;
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break;
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}
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/*
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* Decode xres/yres
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*/
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info->var.xres_virtual = (((lcdcon >> 13) & 0x3f) + 1) * 16;
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info->var.yres_virtual = (((lcdcon & 0x1fff) + 1) * 128) /
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(info->var.xres_virtual *
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info->var.bits_per_pixel);
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/*
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* Calculate pixclock
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*/
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info->var.pixclock = (((lcdcon >> 19) & 0x3f) + 1) * 244140 / 9;
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/*
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* Grab AC prescale
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*/
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lcd_ac_prescale = (lcdcon >> 25) & 0x1f;
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}
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info->var.xres = info->var.xres_virtual;
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info->var.yres = info->var.yres_virtual;
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info->var.grayscale = info->var.bits_per_pixel > 1;
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size = info->var.xres * info->var.yres * info->var.bits_per_pixel / 8;
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/*
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* Might be worth checking to see if we can use the on-board
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* RAM if size here...
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* CLPS7110 - no on-board SRAM
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* EP7212 - 38400 bytes
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*/
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if (size <= 38400) {
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printk(KERN_INFO "CLPS711xFB: could use on-board SRAM?\n");
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}
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if ((syscon & SYSCON1_LCDEN) == 0) {
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/*
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* The display isn't running. Ensure that
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* the display memory is empty.
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*/
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memset(virt_base, 0, size);
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}
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info->screen_base = virt_base;
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info->fix.smem_start = phys_base;
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info->fix.smem_len = PAGE_ALIGN(size);
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info->fix.type = FB_TYPE_PACKED_PIXELS;
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}
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int __init clps711xfb_init(void)
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{
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int err = -ENOMEM;
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if (fb_get_options("clps711xfb", NULL))
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return -ENODEV;
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cfb = kzalloc(sizeof(*cfb), GFP_KERNEL);
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if (!cfb)
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goto out;
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strcpy(cfb->fix.id, "clps711x");
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cfb->fbops = &clps7111fb_ops;
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cfb->flags = FBINFO_DEFAULT;
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clps711x_guess_lcd_params(cfb);
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fb_alloc_cmap(&cfb->cmap, CMAP_MAX_SIZE, 0);
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if (!proc_create("backlight", 0444, NULL, &backlight_proc_fops)) {
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printk("Couldn't create the /proc entry for the backlight.\n");
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return -EINVAL;
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}
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/*
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* Power up the LCD
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*/
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if (machine_is_p720t()) {
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PLD_LCDEN = PLD_LCDEN_EN;
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PLD_PWR |= (PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
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}
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if (machine_is_edb7211()) {
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/* Power up the LCD panel. */
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clps_writeb(clps_readb(PDDR) | EDB_PD2_LCDEN, PDDR);
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/* Delay for a little while. */
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udelay(100);
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/* Power up the LCD DC-DC converter. */
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clps_writeb(clps_readb(PDDR) | EDB_PD1_LCD_DC_DC_EN, PDDR);
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/* Turn on the LCD backlight. */
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clps_writeb(clps_readb(PDDR) | EDB_PD3_LCDBL, PDDR);
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}
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err = register_framebuffer(cfb);
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out: return err;
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}
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static void __exit clps711xfb_exit(void)
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{
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unregister_framebuffer(cfb);
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kfree(cfb);
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/*
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* Power down the LCD
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*/
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if (machine_is_p720t()) {
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PLD_LCDEN = 0;
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PLD_PWR &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
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}
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}
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module_init(clps711xfb_init);
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module_exit(clps711xfb_exit);
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MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
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MODULE_DESCRIPTION("CLPS711x framebuffer driver");
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MODULE_LICENSE("GPL");
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