Max Filippov f29cf77609 xtensa: add load/store exception handler ... Memory attached to instruction bus of the xtensa CPU is only accessible for a limited subset of opcodes. Other opcodes generate an exception with the load/store error cause code. This property complicates use of such systems. Provide a handler that recognizes and transparently fixes such exceptions. The following opcodes are recognized when used outside of FLIX bundles: l32i, l32i.n, l16ui, l16si, l8ui. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>		2023-06-13 21:56:27 -07:00
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boot	xtensa: boot-redboot: clean up Makefile	2023-06-12 19:48:56 -07:00
configs	Xtensa updates for v6.2	2022-12-13 15:25:08 -08:00
include	xtensa: add load/store exception handler	2023-06-13 21:56:27 -07:00
kernel	xtensa: add load/store exception handler	2023-06-13 21:56:27 -07:00
lib	xtensa: add asm-prototypes.h	2023-06-12 19:48:57 -07:00
mm	xtensa: move early_trap_init from kasan_early_init to init_arch	2023-06-13 21:56:27 -07:00
platforms	xtensa: drop platform_halt and platform_power_off	2023-06-12 19:48:56 -07:00
variants	xtensa: add test_kc705_be variant	2018-08-20 12:34:45 -07:00
Kbuild	xtensa: move core-y in arch/xtensa/Makefile to arch/xtensa/Kbuild	2021-08-11 11:37:13 -07:00
Kconfig	xtensa: add load/store exception handler	2023-06-13 21:56:27 -07:00
Kconfig.debug	xtensa: make stack dump size configurable	2019-11-26 11:33:39 -08:00
Makefile	kbuild: remove head-y syntax	2022-10-02 18:06:03 +09:00