Vineet Gupta f3e4de3274 ARC: cacheflush refactor #1: push aux reg ascertaining into leaf routine ... ARC dcache supports 3 ops - Inv, Flush, Flush-n-Inv. The programming model however provides 2 commands FLUSH, INV. INV will either discard or flush-n-discard (based on DT_CTRL bit) The leaf helper __dc_line_loop() used to take the AUX register (corresponding to the 2 commands). Now we push that to within the helper, paving way for code consolidations to follow. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>		2013-11-06 10:41:29 +05:30
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cache_arc700.c	ARC: cacheflush refactor #1: push aux reg ascertaining into leaf routine	2013-11-06 10:41:29 +05:30
dma.c	ARC: I/O and DMA Mappings	2013-02-15 23:15:54 +05:30
extable.c	ARC: Fix coding style issues	2013-04-09 12:21:14 +05:30
fault.c	ARC: Incorrect mm reference used in vmalloc fault handler	2013-11-02 10:27:04 -07:00
init.c	of: Specify initrd location using 64-bit	2013-07-24 11:10:01 +01:00
ioremap.c	ARC: Use <linux/*> headers instead of <asm/*>	2013-04-09 12:21:14 +05:30
Makefile	ARC: [mm] Aliasing VIPT dcache support 4/4	2013-05-09 22:00:57 +05:30
mmap.c	ARC: [mm] Aliasing VIPT dcache support 4/4	2013-05-09 22:00:57 +05:30
tlb.c	ARC: [ASID] Track ASID allocation cycles/generations	2013-08-30 21:42:19 +05:30
tlbex.S	ARC: [ASID] Track ASID allocation cycles/generations	2013-08-30 21:42:19 +05:30