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2ff075c7df
The original intent in cacheinfo was that an architecture specific populate_cache_leaves() would probe the hardware and then cache_shared_cpu_map_setup() and cache_override_properties() would provide firmware help to extend/expand upon what was probed. Arm64 was really the only architecture that was working this way, and with the removal of most of the hardware probing logic it became clear that it was possible to simplify the logic a bit. This patch combines the walk of the DT nodes with the code updating the cache size/line_size and nr_sets. cache_override_properties() (which was DT specific) is then removed. The result is that cacheinfo.of_node is no longer used as a temporary place to hold DT references for future calls that update cache properties. That change helps to clarify its one remaining use (matching cacheinfo nodes that represent shared caches) which will be used by the ACPI/PPTT code in the following patches. Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Vijaya Kumar K <vkilari@codeaurora.org> Tested-by: Xiongfeng Wang <wangxiongfeng2@huawei.com> Tested-by: Tomasz Nowicki <Tomasz.Nowicki@cavium.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
104 lines
3 KiB
C
104 lines
3 KiB
C
/*
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* Copyright (C) 2017 SiFive
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/cacheinfo.h>
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#include <linux/cpu.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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static void ci_leaf_init(struct cacheinfo *this_leaf,
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struct device_node *node,
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enum cache_type type, unsigned int level)
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{
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this_leaf->level = level;
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this_leaf->type = type;
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/* not a sector cache */
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this_leaf->physical_line_partition = 1;
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/* TODO: Add to DTS */
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this_leaf->attributes =
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CACHE_WRITE_BACK
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| CACHE_READ_ALLOCATE
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| CACHE_WRITE_ALLOCATE;
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}
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static int __init_cache_level(unsigned int cpu)
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{
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct device_node *np = of_cpu_device_node_get(cpu);
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int levels = 0, leaves = 0, level;
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if (of_property_read_bool(np, "cache-size"))
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++leaves;
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if (of_property_read_bool(np, "i-cache-size"))
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++leaves;
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if (of_property_read_bool(np, "d-cache-size"))
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++leaves;
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if (leaves > 0)
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levels = 1;
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while ((np = of_find_next_cache_node(np))) {
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if (!of_device_is_compatible(np, "cache"))
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break;
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if (of_property_read_u32(np, "cache-level", &level))
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break;
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if (level <= levels)
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break;
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if (of_property_read_bool(np, "cache-size"))
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++leaves;
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if (of_property_read_bool(np, "i-cache-size"))
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++leaves;
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if (of_property_read_bool(np, "d-cache-size"))
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++leaves;
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levels = level;
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}
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this_cpu_ci->num_levels = levels;
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this_cpu_ci->num_leaves = leaves;
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return 0;
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}
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static int __populate_cache_leaves(unsigned int cpu)
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{
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf = this_cpu_ci->info_list;
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struct device_node *np = of_cpu_device_node_get(cpu);
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int levels = 1, level = 1;
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if (of_property_read_bool(np, "cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level);
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if (of_property_read_bool(np, "i-cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level);
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if (of_property_read_bool(np, "d-cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level);
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while ((np = of_find_next_cache_node(np))) {
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if (!of_device_is_compatible(np, "cache"))
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break;
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if (of_property_read_u32(np, "cache-level", &level))
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break;
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if (level <= levels)
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break;
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if (of_property_read_bool(np, "cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level);
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if (of_property_read_bool(np, "i-cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level);
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if (of_property_read_bool(np, "d-cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level);
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levels = level;
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}
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return 0;
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}
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DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
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DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
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