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c11333cc2e
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain, so it can be power managed using that clock in the future. Note that currently the GIC-400 driver doesn't support module clocks nor Runtime PM, so this must be handled as a critical clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
/*
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* Copyright 2014 Ulrich Hecht
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A73A4_H__
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#define __DT_BINDINGS_CLOCK_R8A73A4_H__
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/* CPG */
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#define R8A73A4_CLK_MAIN 0
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#define R8A73A4_CLK_PLL0 1
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#define R8A73A4_CLK_PLL1 2
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#define R8A73A4_CLK_PLL2 3
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#define R8A73A4_CLK_PLL2S 4
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#define R8A73A4_CLK_PLL2H 5
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#define R8A73A4_CLK_Z 6
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#define R8A73A4_CLK_Z2 7
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#define R8A73A4_CLK_I 8
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#define R8A73A4_CLK_M3 9
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#define R8A73A4_CLK_B 10
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#define R8A73A4_CLK_M1 11
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#define R8A73A4_CLK_M2 12
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#define R8A73A4_CLK_ZX 13
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#define R8A73A4_CLK_ZS 14
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#define R8A73A4_CLK_HP 15
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/* MSTP2 */
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#define R8A73A4_CLK_DMAC 18
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#define R8A73A4_CLK_SCIFB3 17
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#define R8A73A4_CLK_SCIFB2 16
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#define R8A73A4_CLK_SCIFB1 7
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#define R8A73A4_CLK_SCIFB0 6
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#define R8A73A4_CLK_SCIFA0 4
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#define R8A73A4_CLK_SCIFA1 3
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/* MSTP3 */
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#define R8A73A4_CLK_CMT1 29
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#define R8A73A4_CLK_IIC1 23
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#define R8A73A4_CLK_IIC0 18
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#define R8A73A4_CLK_IIC7 17
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#define R8A73A4_CLK_IIC6 16
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#define R8A73A4_CLK_MMCIF0 15
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#define R8A73A4_CLK_SDHI0 14
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#define R8A73A4_CLK_SDHI1 13
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#define R8A73A4_CLK_SDHI2 12
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#define R8A73A4_CLK_MMCIF1 5
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#define R8A73A4_CLK_IIC2 0
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/* MSTP4 */
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#define R8A73A4_CLK_IIC3 11
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#define R8A73A4_CLK_IIC4 10
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#define R8A73A4_CLK_IIC5 9
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#define R8A73A4_CLK_INTC_SYS 8
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#define R8A73A4_CLK_IRQC 7
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/* MSTP5 */
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#define R8A73A4_CLK_THERMAL 22
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#define R8A73A4_CLK_IIC8 15
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#endif /* __DT_BINDINGS_CLOCK_R8A73A4_H__ */
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