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![Matthew Wilcox](/assets/img/avatar_default.png)
Both spin locks and write locks currently do: f0 0f b1 17 lock cmpxchg %edx,(%rdi) 85 c0 test %eax,%eax 75 05 jne [slowpath] This 'test' insn is superfluous; the cmpxchg insn sets the Z flag appropriately. Peter pointed out that using atomic_try_cmpxchg_acquire() will let the compiler know this is true. Comparing before/after disassemblies show the only effect is to remove this insn. Take this opportunity to make the spin & write lock code resemble each other more closely and have similar likely() hints. Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Waiman Long <longman@redhat.com> Link: http://lkml.kernel.org/r/20180820162639.GC25153@bombadil.infradead.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
125 lines
3.6 KiB
C
125 lines
3.6 KiB
C
/*
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* Queued spinlock
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.
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* (C) Copyright 2015 Hewlett-Packard Enterprise Development LP
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*
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* Authors: Waiman Long <waiman.long@hpe.com>
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*/
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#ifndef __ASM_GENERIC_QSPINLOCK_H
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#define __ASM_GENERIC_QSPINLOCK_H
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#include <asm-generic/qspinlock_types.h>
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/**
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* queued_spin_is_locked - is the spinlock locked?
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* @lock: Pointer to queued spinlock structure
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* Return: 1 if it is locked, 0 otherwise
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*/
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static __always_inline int queued_spin_is_locked(struct qspinlock *lock)
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{
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/*
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* Any !0 state indicates it is locked, even if _Q_LOCKED_VAL
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* isn't immediately observable.
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*/
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return atomic_read(&lock->val);
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}
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/**
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* queued_spin_value_unlocked - is the spinlock structure unlocked?
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* @lock: queued spinlock structure
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* Return: 1 if it is unlocked, 0 otherwise
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*
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* N.B. Whenever there are tasks waiting for the lock, it is considered
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* locked wrt the lockref code to avoid lock stealing by the lockref
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* code and change things underneath the lock. This also allows some
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* optimizations to be applied without conflict with lockref.
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*/
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static __always_inline int queued_spin_value_unlocked(struct qspinlock lock)
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{
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return !atomic_read(&lock.val);
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}
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/**
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* queued_spin_is_contended - check if the lock is contended
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* @lock : Pointer to queued spinlock structure
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* Return: 1 if lock contended, 0 otherwise
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*/
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static __always_inline int queued_spin_is_contended(struct qspinlock *lock)
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{
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return atomic_read(&lock->val) & ~_Q_LOCKED_MASK;
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}
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/**
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* queued_spin_trylock - try to acquire the queued spinlock
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* @lock : Pointer to queued spinlock structure
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* Return: 1 if lock acquired, 0 if failed
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*/
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static __always_inline int queued_spin_trylock(struct qspinlock *lock)
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{
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u32 val = atomic_read(&lock->val);
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if (unlikely(val))
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return 0;
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return likely(atomic_try_cmpxchg_acquire(&lock->val, &val, _Q_LOCKED_VAL));
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}
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extern void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
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/**
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* queued_spin_lock - acquire a queued spinlock
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* @lock: Pointer to queued spinlock structure
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*/
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static __always_inline void queued_spin_lock(struct qspinlock *lock)
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{
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u32 val = 0;
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if (likely(atomic_try_cmpxchg_acquire(&lock->val, &val, _Q_LOCKED_VAL)))
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return;
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queued_spin_lock_slowpath(lock, val);
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}
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#ifndef queued_spin_unlock
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/**
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* queued_spin_unlock - release a queued spinlock
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* @lock : Pointer to queued spinlock structure
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*/
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static __always_inline void queued_spin_unlock(struct qspinlock *lock)
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{
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/*
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* unlock() needs release semantics:
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*/
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smp_store_release(&lock->locked, 0);
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}
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#endif
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#ifndef virt_spin_lock
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static __always_inline bool virt_spin_lock(struct qspinlock *lock)
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{
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return false;
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}
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#endif
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/*
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* Remapping spinlock architecture specific functions to the corresponding
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* queued spinlock functions.
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*/
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#define arch_spin_is_locked(l) queued_spin_is_locked(l)
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#define arch_spin_is_contended(l) queued_spin_is_contended(l)
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#define arch_spin_value_unlocked(l) queued_spin_value_unlocked(l)
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#define arch_spin_lock(l) queued_spin_lock(l)
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#define arch_spin_trylock(l) queued_spin_trylock(l)
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#define arch_spin_unlock(l) queued_spin_unlock(l)
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#endif /* __ASM_GENERIC_QSPINLOCK_H */
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