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The patch crypto: caam - Add definition of rd/wr_reg64 for little endian platform added support for little endian platforms to the CAAM driver. Namely a write and read function for 64 bit registers. The only user of this functions is the Job Ring driver (drivers/crypto/caam/jr.c). It uses the functions to set the DMA addresses for the input/output rings. However, at least in the default configuration, the least significant 32 bits are always in the base+0x0004 address; independent of the endianness of the bytes itself. That means the addresses do not change with the system endianness. DMA addresses are only 32 bits wide on non-64-bit systems, writing the upper 32 bits of this value to the register for the least significant bits results in the DMA address being set to 0. Fix this by always writing the registers in the same way. Suggested-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
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| .. | ||
| amcc | ||
| caam | ||
| ccp | ||
| nx | ||
| qat | ||
| qce | ||
| ux500 | ||
| vmx | ||
| atmel-aes-regs.h | ||
| atmel-aes.c | ||
| atmel-sha-regs.h | ||
| atmel-sha.c | ||
| atmel-tdes-regs.h | ||
| atmel-tdes.c | ||
| bfin_crc.c | ||
| bfin_crc.h | ||
| geode-aes.c | ||
| geode-aes.h | ||
| hifn_795x.c | ||
| img-hash.c | ||
| ixp4xx_crypto.c | ||
| Kconfig | ||
| Makefile | ||
| mv_cesa.c | ||
| mv_cesa.h | ||
| mxs-dcp.c | ||
| n2_asm.S | ||
| n2_core.c | ||
| n2_core.h | ||
| omap-aes.c | ||
| omap-des.c | ||
| omap-sham.c | ||
| padlock-aes.c | ||
| padlock-sha.c | ||
| picoxcell_crypto.c | ||
| picoxcell_crypto_regs.h | ||
| s5p-sss.c | ||
| sahara.c | ||
| talitos.c | ||
| talitos.h | ||