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As usual, there are lots of minor driver changes across SoC platforms from NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung. These usually add support for additional chip variations in existing drivers, but also add features or bugfixes. The SCMI firmware subsystem gains a unified raw userspace interface through debugfs, which can be used for validation purposes. Newly added drivers include: - New power management drivers for StarFive JH7110, Allwinner D1 and Renesas RZ/V2M - A driver for Qualcomm battery and power supply status - A SoC device driver for identifying Nuvoton WPCM450 chips - A regulator coupler driver for Mediatek MT81xxv -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPtSN8ACgkQmmx57+YA GNkOSw/+JS5tElm/ZP7c3uWYp6uwvcb0jUlKW/U3aCtPiPEcYDLEqIEXwcNdaDMh m4rW3GYlW0IRL3FsyuYkSLx+EIIUIfs40wldYXJOqRDj0XasndiloIwltOQJGfd9 C/UVM0FpJdxMJrcBMFgwLLQCIbAVnhHP34i6ppDRgxW/MfTeiCaaG6fnS70iv6mC oh2N7FoZSKDtTrFtlR5TqFiK5v/W1CgNJVuglkFB0ceFpjyBpp/8AT0FGS887xCz IYSTqm4Q/79vaZXI1Y2oog257cgdwsVqgPrnK5CuSFhTnAcJMCekiFelHq8Yhyuk Rw7j/B3KO3AOaxmR75c6SZdeZ+VHgUMRC/RKe3fay0sm3Zea2kAIPXA6Zn+r/cxb 8M94V59qBz+f8XmpXRTK1UR3s3EbwFIuNyuDIkeorMtpSKtvqJXmZxGDwNIfXr2F /voo++MKjzdtdxdW/D/5Tc9DC0Pyb4HLi0EYj2QCzA03njmfLDF1w73NfzMec+GD R1zAd3FEbiJQx8Hin0PSPjYXpfMnkjkGAEcE9N9Ralg4ewNWAxfOFsAhHKTZNssL pitTAvHR/+dXtvkX7FUi2l/6fqn8nJUrg/xRazPPp3scRbpuk8m6P4MNr3/lsaHk HTQ/hYwDdecWLvKXjw5y9yIr3yhLmPPcloTVIIFFjsM0t8b+d9E= =p6Xp -----END PGP SIGNATURE----- Merge tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "As usual, there are lots of minor driver changes across SoC platforms from NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung. These usually add support for additional chip variations in existing drivers, but also add features or bugfixes. The SCMI firmware subsystem gains a unified raw userspace interface through debugfs, which can be used for validation purposes. Newly added drivers include: - New power management drivers for StarFive JH7110, Allwinner D1 and Renesas RZ/V2M - A driver for Qualcomm battery and power supply status - A SoC device driver for identifying Nuvoton WPCM450 chips - A regulator coupler driver for Mediatek MT81xxv" * tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits) power: supply: Introduce Qualcomm PMIC GLINK power supply soc: apple: rtkit: Do not copy the reg state structure to the stack soc: sunxi: SUN20I_PPU should depend on PM memory: renesas-rpc-if: Remove redundant division of dummy soc: qcom: socinfo: Add IDs for IPQ5332 and its variant dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1 firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/ MAINTAINERS: Update qcom CPR maintainer entry dt-bindings: firmware: document Qualcomm SM8550 SCM dt-bindings: firmware: qcom,scm: add qcom,scm-sa8775p compatible soc: qcom: socinfo: Add Soc IDs for IPQ8064 and variants dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants soc: qcom: socinfo: Add support for new field in revision 17 soc: qcom: smd-rpm: Add IPQ9574 compatible soc: qcom: pmic_glink: remove redundant calculation of svid soc: qcom: stats: Populate all subsystem debugfs files dt-bindings: soc: qcom,rpmh-rsc: Update to allow for generic nodes soc: qcom: pmic_glink: add CONFIG_NET/CONFIG_OF dependencies soc: qcom: pmic_glink: Introduce altmode support ...
196 lines
4.5 KiB
C
196 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
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* Copyright (c) 2014,2015, Linaro Ltd.
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*
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* SAW power controller driver
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/cpuidle.h>
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#include <linux/cpu_pm.h>
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#include <linux/firmware/qcom/qcom_scm.h>
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#include <soc/qcom/spm.h>
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#include <asm/proc-fns.h>
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#include <asm/suspend.h>
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#include "dt_idle_states.h"
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struct cpuidle_qcom_spm_data {
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struct cpuidle_driver cpuidle_driver;
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struct spm_driver_data *spm;
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};
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static int qcom_pm_collapse(unsigned long int unused)
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{
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qcom_scm_cpu_power_down(QCOM_SCM_CPU_PWR_DOWN_L2_ON);
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/*
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* Returns here only if there was a pending interrupt and we did not
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* power down as a result.
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*/
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return -1;
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}
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static int qcom_cpu_spc(struct spm_driver_data *drv)
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{
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int ret;
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spm_set_low_power_mode(drv, PM_SLEEP_MODE_SPC);
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ret = cpu_suspend(0, qcom_pm_collapse);
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/*
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* ARM common code executes WFI without calling into our driver and
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* if the SPM mode is not reset, then we may accidently power down the
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* cpu when we intended only to gate the cpu clock.
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* Ensure the state is set to standby before returning.
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*/
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spm_set_low_power_mode(drv, PM_SLEEP_MODE_STBY);
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return ret;
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}
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static __cpuidle int spm_enter_idle_state(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int idx)
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{
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struct cpuidle_qcom_spm_data *data = container_of(drv, struct cpuidle_qcom_spm_data,
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cpuidle_driver);
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return CPU_PM_CPU_IDLE_ENTER_PARAM(qcom_cpu_spc, idx, data->spm);
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}
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static struct cpuidle_driver qcom_spm_idle_driver = {
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.name = "qcom_spm",
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.owner = THIS_MODULE,
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.states[0] = {
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.enter = spm_enter_idle_state,
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.exit_latency = 1,
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.target_residency = 1,
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.power_usage = UINT_MAX,
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.name = "WFI",
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.desc = "ARM WFI",
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}
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};
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static const struct of_device_id qcom_idle_state_match[] = {
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{ .compatible = "qcom,idle-state-spc", .data = spm_enter_idle_state },
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{ },
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};
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static int spm_cpuidle_register(struct device *cpuidle_dev, int cpu)
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{
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struct platform_device *pdev = NULL;
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struct device_node *cpu_node, *saw_node;
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struct cpuidle_qcom_spm_data *data = NULL;
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int ret;
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cpu_node = of_cpu_device_node_get(cpu);
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if (!cpu_node)
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return -ENODEV;
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saw_node = of_parse_phandle(cpu_node, "qcom,saw", 0);
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if (!saw_node)
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return -ENODEV;
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pdev = of_find_device_by_node(saw_node);
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of_node_put(saw_node);
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of_node_put(cpu_node);
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if (!pdev)
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return -ENODEV;
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data = devm_kzalloc(cpuidle_dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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data->spm = dev_get_drvdata(&pdev->dev);
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if (!data->spm)
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return -EINVAL;
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data->cpuidle_driver = qcom_spm_idle_driver;
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data->cpuidle_driver.cpumask = (struct cpumask *)cpumask_of(cpu);
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ret = dt_init_idle_driver(&data->cpuidle_driver,
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qcom_idle_state_match, 1);
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if (ret <= 0)
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return ret ? : -ENODEV;
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return cpuidle_register(&data->cpuidle_driver, NULL);
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}
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static int spm_cpuidle_drv_probe(struct platform_device *pdev)
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{
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int cpu, ret;
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if (!qcom_scm_is_available())
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return -EPROBE_DEFER;
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ret = qcom_scm_set_warm_boot_addr(cpu_resume_arm);
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if (ret)
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return dev_err_probe(&pdev->dev, ret, "set warm boot addr failed");
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for_each_possible_cpu(cpu) {
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ret = spm_cpuidle_register(&pdev->dev, cpu);
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if (ret && ret != -ENODEV) {
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dev_err(&pdev->dev,
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"Cannot register for CPU%d: %d\n", cpu, ret);
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}
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}
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return 0;
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}
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static struct platform_driver spm_cpuidle_driver = {
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.probe = spm_cpuidle_drv_probe,
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.driver = {
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.name = "qcom-spm-cpuidle",
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.suppress_bind_attrs = true,
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},
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};
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static bool __init qcom_spm_find_any_cpu(void)
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{
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struct device_node *cpu_node, *saw_node;
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for_each_of_cpu_node(cpu_node) {
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saw_node = of_parse_phandle(cpu_node, "qcom,saw", 0);
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if (of_device_is_available(saw_node)) {
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of_node_put(saw_node);
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of_node_put(cpu_node);
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return true;
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}
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of_node_put(saw_node);
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}
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return false;
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}
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static int __init qcom_spm_cpuidle_init(void)
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{
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struct platform_device *pdev;
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int ret;
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ret = platform_driver_register(&spm_cpuidle_driver);
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if (ret)
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return ret;
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/* Make sure there is actually any CPU managed by the SPM */
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if (!qcom_spm_find_any_cpu())
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return 0;
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pdev = platform_device_register_simple("qcom-spm-cpuidle",
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-1, NULL, 0);
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if (IS_ERR(pdev)) {
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platform_driver_unregister(&spm_cpuidle_driver);
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return PTR_ERR(pdev);
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}
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return 0;
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}
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device_initcall(qcom_spm_cpuidle_init);
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