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![Ivan Bornyakov](/assets/img/avatar_default.png)
Add support to the FPGA manager for programming Lattice ECP5 FPGA over slave SPI sysCONFIG interface. sysCONFIG interface core functionality is separate from both ECP5 and SPI specifics, so support for other FPGAs with different port types can be added in the future. Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru> Acked-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20221025053947.2737-2-i.bornyakov@metrotek.ru [yilun.xu@intel.com: remove redundant blank line after kmemdup] Signed-off-by: Xu Yilun <yilun.xu@intel.com>
152 lines
3.7 KiB
C
152 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Lattice FPGA programming over slave SPI sysCONFIG interface.
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*/
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#include <linux/spi/spi.h>
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#include "lattice-sysconfig.h"
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static const u32 ecp5_spi_max_speed_hz = 60000000;
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static int sysconfig_spi_cmd_transfer(struct sysconfig_priv *priv,
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const void *tx_buf, size_t tx_len,
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void *rx_buf, size_t rx_len)
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{
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struct spi_device *spi = to_spi_device(priv->dev);
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return spi_write_then_read(spi, tx_buf, tx_len, rx_buf, rx_len);
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}
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static int sysconfig_spi_bitstream_burst_init(struct sysconfig_priv *priv)
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{
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const u8 lsc_bitstream_burst[] = SYSCONFIG_LSC_BITSTREAM_BURST;
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struct spi_device *spi = to_spi_device(priv->dev);
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struct spi_transfer xfer = {};
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struct spi_message msg;
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size_t buf_len;
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void *buf;
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int ret;
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buf_len = sizeof(lsc_bitstream_burst);
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buf = kmemdup(lsc_bitstream_burst, buf_len, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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xfer.len = buf_len;
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xfer.tx_buf = buf;
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xfer.cs_change = 1;
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spi_message_init_with_transfers(&msg, &xfer, 1);
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/*
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* Lock SPI bus for exclusive usage until FPGA programming is done.
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* SPI bus will be released in sysconfig_spi_bitstream_burst_complete().
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*/
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spi_bus_lock(spi->controller);
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ret = spi_sync_locked(spi, &msg);
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if (ret)
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spi_bus_unlock(spi->controller);
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kfree(buf);
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return ret;
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}
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static int sysconfig_spi_bitstream_burst_write(struct sysconfig_priv *priv,
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const char *buf, size_t len)
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{
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struct spi_device *spi = to_spi_device(priv->dev);
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struct spi_transfer xfer = {
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.tx_buf = buf,
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.len = len,
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.cs_change = 1,
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};
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struct spi_message msg;
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spi_message_init_with_transfers(&msg, &xfer, 1);
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return spi_sync_locked(spi, &msg);
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}
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static int sysconfig_spi_bitstream_burst_complete(struct sysconfig_priv *priv)
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{
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struct spi_device *spi = to_spi_device(priv->dev);
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/* Bitstream burst write is done, release SPI bus */
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spi_bus_unlock(spi->controller);
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/* Toggle CS to finish bitstream write */
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return spi_write(spi, NULL, 0);
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}
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static int sysconfig_spi_probe(struct spi_device *spi)
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{
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const struct spi_device_id *dev_id;
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struct device *dev = &spi->dev;
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struct sysconfig_priv *priv;
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const u32 *spi_max_speed;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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spi_max_speed = device_get_match_data(dev);
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if (!spi_max_speed) {
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dev_id = spi_get_device_id(spi);
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if (!dev_id)
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return -ENODEV;
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spi_max_speed = (const u32 *)dev_id->driver_data;
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}
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if (!spi_max_speed)
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return -EINVAL;
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if (spi->max_speed_hz > *spi_max_speed) {
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dev_err(dev, "SPI speed %u is too high, maximum speed is %u\n",
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spi->max_speed_hz, *spi_max_speed);
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return -EINVAL;
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}
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priv->dev = dev;
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priv->command_transfer = sysconfig_spi_cmd_transfer;
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priv->bitstream_burst_write_init = sysconfig_spi_bitstream_burst_init;
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priv->bitstream_burst_write = sysconfig_spi_bitstream_burst_write;
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priv->bitstream_burst_write_complete = sysconfig_spi_bitstream_burst_complete;
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return sysconfig_probe(priv);
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}
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static const struct spi_device_id sysconfig_spi_ids[] = {
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{
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.name = "sysconfig-ecp5",
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.driver_data = (kernel_ulong_t)&ecp5_spi_max_speed_hz,
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}, {},
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};
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MODULE_DEVICE_TABLE(spi, sysconfig_spi_ids);
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#if IS_ENABLED(CONFIG_OF)
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static const struct of_device_id sysconfig_of_ids[] = {
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{
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.compatible = "lattice,sysconfig-ecp5",
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.data = &ecp5_spi_max_speed_hz,
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}, {},
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};
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MODULE_DEVICE_TABLE(of, sysconfig_of_ids);
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#endif /* IS_ENABLED(CONFIG_OF) */
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static struct spi_driver lattice_sysconfig_driver = {
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.probe = sysconfig_spi_probe,
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.id_table = sysconfig_spi_ids,
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.driver = {
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.name = "lattice_sysconfig_spi_fpga_mgr",
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.of_match_table = of_match_ptr(sysconfig_of_ids),
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},
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};
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module_spi_driver(lattice_sysconfig_driver);
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MODULE_DESCRIPTION("Lattice sysCONFIG Slave SPI FPGA Manager");
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MODULE_LICENSE("GPL");
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