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f2855eec19
- ti: default to ARCH_K3 for msg manager
- mediatek: add mt8188 and mt8186 support
request irq only after got ready
- zynq-ipi: fix error handling after device_register
- mpfs: check sys-con status
- rockchip: simplify by using device_get_match_data
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmOh4IcACgkQf9lkf8eY
P5UVgw/+LMCzDu7Dqm9PfcVyW2I1EWV2BpHsJRjn9ivxPCrnPAburZb9x9uPzL5u
q3192eRuy1MSpGX4lBVFYIZc4V7NrXINmMCB61s87k3g/bXxA3KzkgooxxPEo9LJ
KbxzHngoLj+0+Mr6uXqv/rjudohFbl81yn0JfkdEPygj3XmAMaLmOqVEbV7JmbUU
IdyQUfxyEWmozotF5w0ndVhoOhXYnE44XnlimAv0DDU/kxEy1D1JAG/D5oUTjnPw
FZpdMwaCB/YObHJGLARwDRyKCA8h3eRsf/iGzsoaNy7GHyGcSCZJ/efy6q7KXdMM
jabptiuAFjM0NXzqf+L0y6oYvV9ESQr17P5Q9sLUdT66fFPctUUHcGnmLdFGQZEf
3d3ShLCWGYhb0Th9giQkrqcArxwRhiIc9SoBn39CRLiM+cvzcfSDBghTfdJpQb5X
VfzJqaWJSi3AE+uhXchOUFDlNQVp0/5DH/1Y/WyOpQI2wZ/jPVh3JzU9J5Tmakyn
Hl2doj1LNZstUfS7GBSM4P8peDYOx2cv57auD7FOu4enDjVGCyBhuAcD9Z5KonEg
4Y06K8omL1NEFZ3/t3NiG+WANWrEGjHxCtPItU2BFhEqQ6iMLURoj6FcNK7NcQB5
zq+Xs9ISSQlgDwMYTWWIZcqQ4/egFG5VW572187pptiMRxHezjw=
=j33p
-----END PGP SIGNATURE-----
Merge tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar:
- qcom: enable sc8280xp, sm8550 and sm4250 support
- ti: default to ARCH_K3 for msg manager
- mediatek:
- add mt8188 and mt8186 support
- request irq only after got ready
- zynq-ipi: fix error handling after device_register
- mpfs: check sys-con status
- rockchip: simplify by using device_get_match_data
* tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
dt-bindings: mailbox: qcom-ipcc: Add compatible for SM8550
mailbox: mtk-cmdq: Do not request irq until we are ready
mailbox: zynq-ipi: fix error handling while device_register() fails
mailbox: mtk-cmdq-mailbox: Use platform data directly instead of copying
mailbox: arm_mhuv2: Fix return value check in mhuv2_probe()
dt-bindings: mailbox: mediatek,gce-mailbox: add mt8188 compatible name
dt-bindings: mailbox: add GCE header file for mt8188
mailbox: mpfs: read the system controller's status
mailbox: mtk-cmdq: add MT8186 support
mailbox: mtk-cmdq: add gce ddr enable support flow
mailbox: mtk-cmdq: add gce software ddr enable private data
mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number
mailbox: rockchip: Use device_get_match_data() to simplify the code
dt-bindings: mailbox: qcom-ipcc: Add sc8280xp compatible
mailbox: config: ti-msgmgr: Default set to ARCH_K3 for TI msg manager
mailbox: qcom-apcs-ipc: Add SM4250 APCS IPC support
dt-bindings: mailbox: qcom: Add SM4250 APCS compatible
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298 lines
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# SPDX-License-Identifier: GPL-2.0-only
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menuconfig MAILBOX
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bool "Mailbox Hardware Support"
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help
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Mailbox is a framework to control hardware communication between
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on-chip processors through queued messages and interrupt driven
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signals. Say Y if your platform supports hardware mailboxes.
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if MAILBOX
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config APPLE_MAILBOX
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tristate "Apple Mailbox driver"
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depends on ARCH_APPLE || (ARM64 && COMPILE_TEST)
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default ARCH_APPLE
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help
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Apple SoCs have various co-processors required for certain
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peripherals to work (NVMe, display controller, etc.). This
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driver adds support for the mailbox controller used to
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communicate with those.
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Say Y here if you have a Apple SoC.
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config ARM_MHU
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tristate "ARM MHU Mailbox"
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depends on ARM_AMBA
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help
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Say Y here if you want to build the ARM MHU controller driver.
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The controller has 3 mailbox channels, the last of which can be
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used in Secure mode only.
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config ARM_MHU_V2
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tristate "ARM MHUv2 Mailbox"
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depends on ARM_AMBA
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help
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Say Y here if you want to build the ARM MHUv2 controller driver,
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which provides unidirectional mailboxes between processing elements.
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config IMX_MBOX
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tristate "i.MX Mailbox"
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depends on ARCH_MXC || COMPILE_TEST
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help
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Mailbox implementation for i.MX Messaging Unit (MU).
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config PLATFORM_MHU
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tristate "Platform MHU Mailbox"
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depends on OF
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depends on HAS_IOMEM
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help
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Say Y here if you want to build a platform specific variant MHU
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controller driver.
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The controller has a maximum of 3 mailbox channels, the last of
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which can be used in Secure mode only.
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config PL320_MBOX
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bool "ARM PL320 Mailbox"
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depends on ARM_AMBA
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help
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An implementation of the ARM PL320 Interprocessor Communication
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Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
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send short messages between Highbank's A9 cores and the EnergyCore
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Management Engine, primarily for cpufreq. Say Y here if you want
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to use the PL320 IPCM support.
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config ARMADA_37XX_RWTM_MBOX
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tristate "Armada 37xx rWTM BIU Mailbox"
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depends on ARCH_MVEBU || COMPILE_TEST
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depends on OF
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help
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Mailbox implementation for communication with the the firmware
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running on the Cortex-M3 rWTM secure processor of the Armada 37xx
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SOC. Say Y here if you are building for such a device (for example
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the Turris Mox router).
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config OMAP2PLUS_MBOX
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tristate "OMAP2+ Mailbox framework support"
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depends on ARCH_OMAP2PLUS || ARCH_K3
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help
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Mailbox implementation for OMAP family chips with hardware for
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interprocessor communication involving DSP, IVA1.0 and IVA2 in
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OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
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want to use OMAP2+ Mailbox framework support.
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config OMAP_MBOX_KFIFO_SIZE
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int "Mailbox kfifo default buffer size (bytes)"
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depends on OMAP2PLUS_MBOX
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default 256
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help
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Specify the default size of mailbox's kfifo buffers (bytes).
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This can also be changed at runtime (via the mbox_kfifo_size
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module parameter).
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config ROCKCHIP_MBOX
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bool "Rockchip Soc Integrated Mailbox Support"
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depends on ARCH_ROCKCHIP || COMPILE_TEST
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help
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This driver provides support for inter-processor communication
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between CPU cores and MCU processor on Some Rockchip SOCs.
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Please check it that the Soc you use have Mailbox hardware.
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Say Y here if you want to use the Rockchip Mailbox support.
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config PCC
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bool "Platform Communication Channel Driver"
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depends on ACPI
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default n
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help
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ACPI 5.0+ spec defines a generic mode of communication
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between the OS and a platform such as the BMC. This medium
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(PCC) is typically used by CPPC (ACPI CPU Performance management),
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RAS (ACPI reliability protocol) and MPST (ACPI Memory power
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states). Select this driver if your platform implements the
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PCC clients mentioned above.
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config ALTERA_MBOX
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tristate "Altera Mailbox"
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depends on HAS_IOMEM
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help
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An implementation of the Altera Mailbox soft core. It is used
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to send message between processors. Say Y here if you want to use the
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Altera mailbox support.
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config BCM2835_MBOX
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tristate "BCM2835 Mailbox"
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depends on ARCH_BCM2835
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help
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An implementation of the BCM2385 Mailbox. It is used to invoke
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the services of the Videocore. Say Y here if you want to use the
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BCM2835 Mailbox.
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config STI_MBOX
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tristate "STI Mailbox framework support"
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depends on ARCH_STI && OF
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help
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Mailbox implementation for STMicroelectonics family chips with
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hardware for interprocessor communication.
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config TI_MESSAGE_MANAGER
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tristate "Texas Instruments Message Manager Driver"
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depends on ARCH_KEYSTONE || ARCH_K3
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default ARCH_K3
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help
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An implementation of Message Manager slave driver for Keystone
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and K3 architecture SoCs from Texas Instruments. Message Manager
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is a communication entity found on few of Texas Instrument's keystone
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and K3 architecture SoCs. These may be used for communication between
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multiple processors within the SoC. Select this driver if your
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platform has support for the hardware block.
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config HI3660_MBOX
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tristate "Hi3660 Mailbox" if EXPERT
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depends on (ARCH_HISI || COMPILE_TEST)
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depends on OF
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default ARCH_HISI
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help
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An implementation of the hi3660 mailbox. It is used to send message
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between application processors and other processors/MCU/DSP. Select
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Y here if you want to use Hi3660 mailbox controller.
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config HI6220_MBOX
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tristate "Hi6220 Mailbox" if EXPERT
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depends on (ARCH_HISI || COMPILE_TEST)
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depends on OF
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default ARCH_HISI
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help
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An implementation of the hi6220 mailbox. It is used to send message
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between application processors and MCU. Say Y here if you want to
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build Hi6220 mailbox controller driver.
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config MAILBOX_TEST
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tristate "Mailbox Test Client"
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depends on OF
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depends on HAS_IOMEM
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help
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Test client to help with testing new Controller driver
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implementations.
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config POLARFIRE_SOC_MAILBOX
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tristate "PolarFire SoC (MPFS) Mailbox"
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depends on HAS_IOMEM
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depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST
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help
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This driver adds support for the PolarFire SoC (MPFS) mailbox controller.
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To compile this driver as a module, choose M here. the
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module will be called mailbox-mpfs.
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If unsure, say N.
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config QCOM_APCS_IPC
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tristate "Qualcomm APCS IPC driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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Say y here to enable support for the APCS IPC mailbox driver,
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providing an interface for invoking the inter-process communication
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signals from the application processor to other masters.
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config TEGRA_HSP_MBOX
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bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
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depends on ARCH_TEGRA
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help
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The Tegra HSP driver is used for the interprocessor communication
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between different remote processors and host processors on Tegra186
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and later SoCs. Say Y here if you want to have this support.
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If unsure say N.
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config XGENE_SLIMPRO_MBOX
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tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
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depends on ARCH_XGENE
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help
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An implementation of the APM X-Gene Interprocessor Communication
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Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
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It is used to send short messages between ARM64-bit cores and
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the SLIMpro Management Engine, primarily for PM. Say Y here if you
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want to use the APM X-Gene SLIMpro IPCM support.
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config BCM_PDC_MBOX
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tristate "Broadcom FlexSparx DMA Mailbox"
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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help
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Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
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which provides access to various offload engines on Broadcom
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SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
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config BCM_FLEXRM_MBOX
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tristate "Broadcom FlexRM Mailbox"
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depends on ARM64
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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select GENERIC_MSI_IRQ
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default m if ARCH_BCM_IPROC
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help
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Mailbox implementation of the Broadcom FlexRM ring manager,
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which provides access to various offload engines on Broadcom
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SoCs. Say Y here if you want to use the Broadcom FlexRM.
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config STM32_IPCC
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tristate "STM32 IPCC Mailbox"
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depends on MACH_STM32MP157 || COMPILE_TEST
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help
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Mailbox implementation for STMicroelectonics STM32 family chips
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with hardware for Inter-Processor Communication Controller (IPCC)
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between processors. Say Y here if you want to have this support.
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config MTK_ADSP_MBOX
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tristate "MediaTek ADSP Mailbox Controller"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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help
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Say yes here to add support for "MediaTek ADSP Mailbox Controller.
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This mailbox driver is used to send notification or short message
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between processors with ADSP. It will place the message to share
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buffer and will access the ipc control.
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config MTK_CMDQ_MBOX
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tristate "MediaTek CMDQ Mailbox Support"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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select MTK_INFRACFG
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help
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Say yes here to add support for the MediaTek Command Queue (CMDQ)
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mailbox driver. The CMDQ is used to help read/write registers with
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critical time limitation, such as updating display configuration
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during the vblank.
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config ZYNQMP_IPI_MBOX
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bool "Xilinx ZynqMP IPI Mailbox"
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depends on ARCH_ZYNQMP && OF
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help
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Say yes here to add support for Xilinx IPI mailbox driver.
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This mailbox driver is used to send notification or short message
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between processors with Xilinx ZynqMP IPI. It will place the
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message to the IPI buffer and will access the IPI control
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registers to kick the other processor or enquire status.
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config SUN6I_MSGBOX
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tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box"
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depends on ARCH_SUNXI || COMPILE_TEST
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default ARCH_SUNXI
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help
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Mailbox implementation for the hardware message box present in
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various Allwinner SoCs. This mailbox is used for communication
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between the application CPUs and the power management coprocessor.
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config SPRD_MBOX
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tristate "Spreadtrum Mailbox"
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depends on ARCH_SPRD || COMPILE_TEST
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help
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Mailbox driver implementation for the Spreadtrum platform. It is used
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to send message between application processors and MCU. Say Y here if
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you want to build the Spreatrum mailbox controller driver.
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config QCOM_IPCC
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tristate "Qualcomm Technologies, Inc. IPCC driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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Qualcomm Technologies, Inc. Inter-Processor Communication Controller
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(IPCC) driver for MSM devices. The driver provides mailbox support for
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sending interrupts to the clients. On the other hand, the driver also
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acts as an interrupt controller for receiving interrupts from clients.
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Say Y here if you want to build this driver.
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endif
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