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![Samuel Holland](/assets/img/avatar_default.png)
Now that the SRAM readout code is fixed by using 32-bit accesses, it always returns the same values as register readout, so the A64 variant no longer needs the workaround. This makes the D1 variant structure redundant, so remove it. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230206134356.839737-2-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
234 lines
5.5 KiB
C
234 lines
5.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Allwinner sunXi SoCs Security ID support.
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*
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* Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
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* Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
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*/
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/random.h>
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/* Registers and special values for doing register-based SID readout on H3 */
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#define SUN8I_SID_PRCTL 0x40
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#define SUN8I_SID_RDKEY 0x60
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#define SUN8I_SID_OFFSET_MASK 0x1FF
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#define SUN8I_SID_OFFSET_SHIFT 16
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#define SUN8I_SID_OP_LOCK (0xAC << 8)
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#define SUN8I_SID_READ BIT(1)
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struct sunxi_sid_cfg {
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u32 value_offset;
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u32 size;
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bool need_register_readout;
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};
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struct sunxi_sid {
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void __iomem *base;
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u32 value_offset;
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};
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static int sunxi_sid_read(void *context, unsigned int offset,
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void *val, size_t bytes)
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{
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struct sunxi_sid *sid = context;
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u32 word;
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/* .stride = 4 so offset is guaranteed to be aligned */
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__ioread32_copy(val, sid->base + sid->value_offset + offset, bytes / 4);
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val += round_down(bytes, 4);
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offset += round_down(bytes, 4);
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bytes = bytes % 4;
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if (!bytes)
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return 0;
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/* Handle any trailing bytes */
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word = readl_relaxed(sid->base + sid->value_offset + offset);
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memcpy(val, &word, bytes);
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return 0;
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}
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static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
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const unsigned int offset,
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u32 *out)
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{
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u32 reg_val;
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int ret;
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/* Set word, lock access, and set read command */
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reg_val = (offset & SUN8I_SID_OFFSET_MASK)
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<< SUN8I_SID_OFFSET_SHIFT;
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reg_val |= SUN8I_SID_OP_LOCK | SUN8I_SID_READ;
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writel(reg_val, sid->base + SUN8I_SID_PRCTL);
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ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
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!(reg_val & SUN8I_SID_READ), 100, 250000);
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if (ret)
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return ret;
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if (out)
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*out = readl(sid->base + SUN8I_SID_RDKEY);
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writel(0, sid->base + SUN8I_SID_PRCTL);
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return 0;
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}
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/*
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* On Allwinner H3, the value on the 0x200 offset of the SID controller seems
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* to be not reliable at all.
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* Read by the registers instead.
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*/
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static int sun8i_sid_read_by_reg(void *context, unsigned int offset,
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void *val, size_t bytes)
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{
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struct sunxi_sid *sid = context;
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u32 word;
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int ret;
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/* .stride = 4 so offset is guaranteed to be aligned */
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while (bytes >= 4) {
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ret = sun8i_sid_register_readout(sid, offset, val);
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if (ret)
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return ret;
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val += 4;
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offset += 4;
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bytes -= 4;
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}
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if (!bytes)
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return 0;
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/* Handle any trailing bytes */
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ret = sun8i_sid_register_readout(sid, offset, &word);
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if (ret)
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return ret;
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memcpy(val, &word, bytes);
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return 0;
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}
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static int sunxi_sid_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct resource *res;
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struct nvmem_config *nvmem_cfg;
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struct nvmem_device *nvmem;
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struct sunxi_sid *sid;
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int size;
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char *randomness;
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const struct sunxi_sid_cfg *cfg;
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sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
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if (!sid)
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return -ENOMEM;
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cfg = of_device_get_match_data(dev);
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if (!cfg)
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return -EINVAL;
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sid->value_offset = cfg->value_offset;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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sid->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(sid->base))
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return PTR_ERR(sid->base);
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size = cfg->size;
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nvmem_cfg = devm_kzalloc(dev, sizeof(*nvmem_cfg), GFP_KERNEL);
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if (!nvmem_cfg)
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return -ENOMEM;
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nvmem_cfg->dev = dev;
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nvmem_cfg->name = "sunxi-sid";
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nvmem_cfg->type = NVMEM_TYPE_OTP;
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nvmem_cfg->read_only = true;
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nvmem_cfg->size = cfg->size;
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nvmem_cfg->word_size = 1;
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nvmem_cfg->stride = 4;
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nvmem_cfg->priv = sid;
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if (cfg->need_register_readout)
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nvmem_cfg->reg_read = sun8i_sid_read_by_reg;
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else
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nvmem_cfg->reg_read = sunxi_sid_read;
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nvmem = devm_nvmem_register(dev, nvmem_cfg);
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if (IS_ERR(nvmem))
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return PTR_ERR(nvmem);
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randomness = kzalloc(size, GFP_KERNEL);
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if (!randomness)
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return -ENOMEM;
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nvmem_cfg->reg_read(sid, 0, randomness, size);
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add_device_randomness(randomness, size);
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kfree(randomness);
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platform_set_drvdata(pdev, nvmem);
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return 0;
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}
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static const struct sunxi_sid_cfg sun4i_a10_cfg = {
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.size = 0x10,
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};
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static const struct sunxi_sid_cfg sun7i_a20_cfg = {
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.size = 0x200,
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};
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static const struct sunxi_sid_cfg sun8i_h3_cfg = {
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.value_offset = 0x200,
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.size = 0x100,
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.need_register_readout = true,
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};
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static const struct sunxi_sid_cfg sun50i_a64_cfg = {
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.value_offset = 0x200,
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.size = 0x100,
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};
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static const struct sunxi_sid_cfg sun50i_h6_cfg = {
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.value_offset = 0x200,
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.size = 0x200,
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};
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static const struct of_device_id sunxi_sid_of_match[] = {
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{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
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{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
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{ .compatible = "allwinner,sun8i-a83t-sid", .data = &sun50i_a64_cfg },
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{ .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
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{ .compatible = "allwinner,sun20i-d1-sid", .data = &sun50i_a64_cfg },
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{ .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
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{ .compatible = "allwinner,sun50i-h5-sid", .data = &sun50i_a64_cfg },
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{ .compatible = "allwinner,sun50i-h6-sid", .data = &sun50i_h6_cfg },
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{/* sentinel */},
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};
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MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
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static struct platform_driver sunxi_sid_driver = {
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.probe = sunxi_sid_probe,
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.driver = {
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.name = "eeprom-sunxi-sid",
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.of_match_table = sunxi_sid_of_match,
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},
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};
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module_platform_driver(sunxi_sid_driver);
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MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
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MODULE_DESCRIPTION("Allwinner sunxi security id driver");
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MODULE_LICENSE("GPL");
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