mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-05 18:39:59 +00:00
![Linus Torvalds](/assets/img/avatar_default.png)
new device support in terms of LoC, but there has been some cleanup in the core as well as the usual minor clk additions to various drivers. Core: - parent tracking has been simplified - CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started - of_clk_init() doesn't consider disabled DT nodes anymore - clk_unregister() had an error path bug squashed - of_clk_get_parent_count() has been fixed to only return unsigned ints - HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone New Drivers: - NXP LPC18xx creg - QCOM IPQ4019 GCC - TI dm814x ADPLL - i.MX6QP Updates: - Cyngus audio clks found on Broadcom iProc devices - Non-critical fixes for BCM2385 PLLs - Samsung exynos5433 updates for clk id errors, HDMI support, suspend/resume simplifications - USB, CAN, LVDS, and FCP clks on shmobile devices - sunxi got support for more clks on new SoCs and went through a minor refactoring/rewrite to use a simpler factor clk construct - rockchip added some more clk ids and added suport for fraction dividers - QCOM GDSCs in msm8996 - A new devm helper to make adding custom actions simpler (acked by Greg) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABCAAGBQJW8fPZAAoJENidgRMleOc9sc0P/2b4k8FiFwjMXiiXI1rcEjiz ZjeVxzyAcwBiYoL8a2XONd+pihjLNcAbDbjk8SGUzmKDDz7elQbrhby/6o1dPlW/ fQEQFa8Xa8zhZgidO1AFc1DmIcPg/u/Z58wHbjIcqDjvzKA63213Ud34NJsRtF6y +EJrIUZiTtj5q1pJgDmqlOv6ImmQtgW/AN51vNXCNNCyS9OsSgQm0DK5/f485HNc 2y5NE5hpijso69HFet5chuT3DiDLz/0dxmgCm/w9CRRzkHxYl3lxV/v07B+rZBo5 cWplFfvJqX7PvQtcP0sPPzZUfGT/vOeTboWprQwI4R3RObS18xLqlq6DEvOTmnqW Jh+9uNBq4+kwSz5GcYjpwvj7+W0FPgIaBVRHrEW9qeXkgDpYloPtnEt8C8GmO6Bt O0bgIzETq9mnRTA+VesIfjmTa4IYRDDUoDwGTw5CnW3jaZmtYJh8GhgZulMfPfyK vfWQkY2OesXFwct0rU8tFiswTPeTRgXqL3AsPYjTPAHx1kfBpvfOQTCzzT7eSBr7 jykd9EXsXrYb/rpIxW7j6KjPpaWu+EouK06wc4TIBGrrWVTIV0ZvybzOBgf0FnpS UDx87OyQb8x9TDMrfKf6bmJyly8y1dXkutFYY4XKIGUydlXIf0kn7AnIXW6SR7mX fTEdLFMZ03ViCojtah5r =bZFY -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The clk changes for this release cycle are mostly dominated by new device support in terms of LoC, but there has been some cleanup in the core as well as the usual minor clk additions to various drivers. Core: - parent tracking has been simplified - CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started - of_clk_init() doesn't consider disabled DT nodes anymore - clk_unregister() had an error path bug squashed - of_clk_get_parent_count() has been fixed to only return unsigned ints - HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone New Drivers: - NXP LPC18xx creg - QCOM IPQ4019 GCC - TI dm814x ADPLL - i.MX6QP Updates: - Cyngus audio clks found on Broadcom iProc devices - Non-critical fixes for BCM2385 PLLs - Samsung exynos5433 updates for clk id errors, HDMI support, suspend/resume simplifications - USB, CAN, LVDS, and FCP clks on shmobile devices - sunxi got support for more clks on new SoCs and went through a minor refactoring/rewrite to use a simpler factor clk construct - rockchip added some more clk ids and added suport for fraction dividers - QCOM GDSCs in msm8996 - A new devm helper to make adding custom actions simpler (acked by Greg)" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (197 commits) clk: bcm2835: fix check of error code returned by devm_ioremap_resource() clk: renesas: div6: use RENESAS for #define clk: renesas: Rename header file renesas.h clk: max77{686,802}: Remove CLK_IS_ROOT clk: versatile: Remove CLK_IS_ROOT clk: sunxi: Remove use of variable length array clk: fixed-rate: Remove CLK_IS_ROOT clk: qcom: Remove CLK_IS_ROOT doc: dt: add documentation for lpc1850-creg-clk driver clk: add lpc18xx creg clk driver clk: lpc32xx: fix compilation warning clk: xgene: Add missing parenthesis when clearing divider value clk: mb86s7x: Remove CLK_IS_ROOT clk: x86: Remove clkdev.h and clk.h includes clk: x86: Remove CLK_IS_ROOT clk: mvebu: Remove CLK_IS_ROOT clk: renesas: move drivers to renesas directory clk: si5{14,351,70}: Remove CLK_IS_ROOT clk: scpi: Remove CLK_IS_ROOT clk: s2mps11: Remove CLK_IS_ROOT ...
460 lines
10 KiB
C
460 lines
10 KiB
C
/*
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* drivers/clk/at91/clk-slow.c
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*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/at91_pmc.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include "pmc.h"
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#include "sckc.h"
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#define SLOW_CLOCK_FREQ 32768
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#define SLOWCK_SW_CYCLES 5
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#define SLOWCK_SW_TIME_USEC ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \
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SLOW_CLOCK_FREQ)
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#define AT91_SCKC_CR 0x00
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#define AT91_SCKC_RCEN (1 << 0)
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#define AT91_SCKC_OSC32EN (1 << 1)
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#define AT91_SCKC_OSC32BYP (1 << 2)
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#define AT91_SCKC_OSCSEL (1 << 3)
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struct clk_slow_osc {
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struct clk_hw hw;
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void __iomem *sckcr;
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unsigned long startup_usec;
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};
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#define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
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struct clk_slow_rc_osc {
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struct clk_hw hw;
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void __iomem *sckcr;
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unsigned long frequency;
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unsigned long accuracy;
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unsigned long startup_usec;
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};
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#define to_clk_slow_rc_osc(hw) container_of(hw, struct clk_slow_rc_osc, hw)
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struct clk_sam9260_slow {
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struct clk_hw hw;
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struct regmap *regmap;
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};
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#define to_clk_sam9260_slow(hw) container_of(hw, struct clk_sam9260_slow, hw)
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struct clk_sam9x5_slow {
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struct clk_hw hw;
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void __iomem *sckcr;
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u8 parent;
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};
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#define to_clk_sam9x5_slow(hw) container_of(hw, struct clk_sam9x5_slow, hw)
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static int clk_slow_osc_prepare(struct clk_hw *hw)
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{
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struct clk_slow_osc *osc = to_clk_slow_osc(hw);
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void __iomem *sckcr = osc->sckcr;
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u32 tmp = readl(sckcr);
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if (tmp & AT91_SCKC_OSC32BYP)
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return 0;
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writel(tmp | AT91_SCKC_OSC32EN, sckcr);
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usleep_range(osc->startup_usec, osc->startup_usec + 1);
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return 0;
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}
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static void clk_slow_osc_unprepare(struct clk_hw *hw)
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{
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struct clk_slow_osc *osc = to_clk_slow_osc(hw);
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void __iomem *sckcr = osc->sckcr;
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u32 tmp = readl(sckcr);
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if (tmp & AT91_SCKC_OSC32BYP)
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return;
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writel(tmp & ~AT91_SCKC_OSC32EN, sckcr);
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}
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static int clk_slow_osc_is_prepared(struct clk_hw *hw)
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{
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struct clk_slow_osc *osc = to_clk_slow_osc(hw);
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void __iomem *sckcr = osc->sckcr;
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u32 tmp = readl(sckcr);
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if (tmp & AT91_SCKC_OSC32BYP)
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return 1;
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return !!(tmp & AT91_SCKC_OSC32EN);
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}
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static const struct clk_ops slow_osc_ops = {
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.prepare = clk_slow_osc_prepare,
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.unprepare = clk_slow_osc_unprepare,
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.is_prepared = clk_slow_osc_is_prepared,
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};
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static struct clk * __init
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at91_clk_register_slow_osc(void __iomem *sckcr,
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const char *name,
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const char *parent_name,
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unsigned long startup,
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bool bypass)
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{
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struct clk_slow_osc *osc;
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struct clk *clk = NULL;
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struct clk_init_data init;
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if (!sckcr || !name || !parent_name)
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return ERR_PTR(-EINVAL);
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osc = kzalloc(sizeof(*osc), GFP_KERNEL);
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if (!osc)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &slow_osc_ops;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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init.flags = CLK_IGNORE_UNUSED;
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osc->hw.init = &init;
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osc->sckcr = sckcr;
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osc->startup_usec = startup;
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if (bypass)
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writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
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sckcr);
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clk = clk_register(NULL, &osc->hw);
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if (IS_ERR(clk))
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kfree(osc);
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return clk;
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}
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void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
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void __iomem *sckcr)
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{
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struct clk *clk;
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const char *parent_name;
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const char *name = np->name;
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u32 startup;
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bool bypass;
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parent_name = of_clk_get_parent_name(np, 0);
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of_property_read_string(np, "clock-output-names", &name);
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of_property_read_u32(np, "atmel,startup-time-usec", &startup);
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bypass = of_property_read_bool(np, "atmel,osc-bypass");
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clk = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
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bypass);
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if (IS_ERR(clk))
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return;
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of_clk_add_provider(np, of_clk_src_simple_get, clk);
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}
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static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
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return osc->frequency;
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}
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static unsigned long clk_slow_rc_osc_recalc_accuracy(struct clk_hw *hw,
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unsigned long parent_acc)
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{
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struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
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return osc->accuracy;
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}
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static int clk_slow_rc_osc_prepare(struct clk_hw *hw)
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{
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struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
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void __iomem *sckcr = osc->sckcr;
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writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr);
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usleep_range(osc->startup_usec, osc->startup_usec + 1);
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return 0;
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}
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static void clk_slow_rc_osc_unprepare(struct clk_hw *hw)
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{
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struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
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void __iomem *sckcr = osc->sckcr;
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writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr);
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}
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static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw)
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{
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struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
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return !!(readl(osc->sckcr) & AT91_SCKC_RCEN);
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}
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static const struct clk_ops slow_rc_osc_ops = {
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.prepare = clk_slow_rc_osc_prepare,
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.unprepare = clk_slow_rc_osc_unprepare,
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.is_prepared = clk_slow_rc_osc_is_prepared,
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.recalc_rate = clk_slow_rc_osc_recalc_rate,
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.recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
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};
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static struct clk * __init
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at91_clk_register_slow_rc_osc(void __iomem *sckcr,
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const char *name,
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unsigned long frequency,
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unsigned long accuracy,
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unsigned long startup)
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{
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struct clk_slow_rc_osc *osc;
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struct clk *clk = NULL;
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struct clk_init_data init;
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if (!sckcr || !name)
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return ERR_PTR(-EINVAL);
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osc = kzalloc(sizeof(*osc), GFP_KERNEL);
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if (!osc)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &slow_rc_osc_ops;
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init.parent_names = NULL;
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init.num_parents = 0;
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init.flags = CLK_IGNORE_UNUSED;
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osc->hw.init = &init;
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osc->sckcr = sckcr;
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osc->frequency = frequency;
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osc->accuracy = accuracy;
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osc->startup_usec = startup;
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clk = clk_register(NULL, &osc->hw);
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if (IS_ERR(clk))
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kfree(osc);
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return clk;
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}
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void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
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void __iomem *sckcr)
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{
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struct clk *clk;
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u32 frequency = 0;
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u32 accuracy = 0;
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u32 startup = 0;
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const char *name = np->name;
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of_property_read_string(np, "clock-output-names", &name);
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of_property_read_u32(np, "clock-frequency", &frequency);
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of_property_read_u32(np, "clock-accuracy", &accuracy);
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of_property_read_u32(np, "atmel,startup-time-usec", &startup);
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clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
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startup);
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if (IS_ERR(clk))
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return;
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of_clk_add_provider(np, of_clk_src_simple_get, clk);
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}
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static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
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void __iomem *sckcr = slowck->sckcr;
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u32 tmp;
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if (index > 1)
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return -EINVAL;
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tmp = readl(sckcr);
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if ((!index && !(tmp & AT91_SCKC_OSCSEL)) ||
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(index && (tmp & AT91_SCKC_OSCSEL)))
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return 0;
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if (index)
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tmp |= AT91_SCKC_OSCSEL;
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else
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tmp &= ~AT91_SCKC_OSCSEL;
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writel(tmp, sckcr);
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usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
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return 0;
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}
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static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw)
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{
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struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
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return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL);
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}
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static const struct clk_ops sam9x5_slow_ops = {
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.set_parent = clk_sam9x5_slow_set_parent,
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.get_parent = clk_sam9x5_slow_get_parent,
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};
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static struct clk * __init
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at91_clk_register_sam9x5_slow(void __iomem *sckcr,
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const char *name,
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const char **parent_names,
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int num_parents)
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{
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struct clk_sam9x5_slow *slowck;
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struct clk *clk = NULL;
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struct clk_init_data init;
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if (!sckcr || !name || !parent_names || !num_parents)
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return ERR_PTR(-EINVAL);
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slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
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if (!slowck)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &sam9x5_slow_ops;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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init.flags = 0;
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slowck->hw.init = &init;
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slowck->sckcr = sckcr;
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slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
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clk = clk_register(NULL, &slowck->hw);
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if (IS_ERR(clk))
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kfree(slowck);
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return clk;
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}
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void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
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void __iomem *sckcr)
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{
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struct clk *clk;
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const char *parent_names[2];
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unsigned int num_parents;
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const char *name = np->name;
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num_parents = of_clk_get_parent_count(np);
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if (num_parents == 0 || num_parents > 2)
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return;
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of_clk_parent_fill(np, parent_names, num_parents);
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of_property_read_string(np, "clock-output-names", &name);
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clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
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num_parents);
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if (IS_ERR(clk))
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return;
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of_clk_add_provider(np, of_clk_src_simple_get, clk);
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}
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static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw)
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{
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struct clk_sam9260_slow *slowck = to_clk_sam9260_slow(hw);
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unsigned int status;
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regmap_read(slowck->regmap, AT91_PMC_SR, &status);
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return status & AT91_PMC_OSCSEL ? 1 : 0;
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}
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static const struct clk_ops sam9260_slow_ops = {
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.get_parent = clk_sam9260_slow_get_parent,
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};
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static struct clk * __init
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at91_clk_register_sam9260_slow(struct regmap *regmap,
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const char *name,
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const char **parent_names,
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int num_parents)
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{
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struct clk_sam9260_slow *slowck;
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struct clk *clk = NULL;
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struct clk_init_data init;
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if (!name)
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return ERR_PTR(-EINVAL);
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if (!parent_names || !num_parents)
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return ERR_PTR(-EINVAL);
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slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
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if (!slowck)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
init.name = name;
|
|
init.ops = &sam9260_slow_ops;
|
|
init.parent_names = parent_names;
|
|
init.num_parents = num_parents;
|
|
init.flags = 0;
|
|
|
|
slowck->hw.init = &init;
|
|
slowck->regmap = regmap;
|
|
|
|
clk = clk_register(NULL, &slowck->hw);
|
|
if (IS_ERR(clk))
|
|
kfree(slowck);
|
|
|
|
return clk;
|
|
}
|
|
|
|
static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
|
|
{
|
|
struct clk *clk;
|
|
const char *parent_names[2];
|
|
unsigned int num_parents;
|
|
const char *name = np->name;
|
|
struct regmap *regmap;
|
|
|
|
num_parents = of_clk_get_parent_count(np);
|
|
if (num_parents != 2)
|
|
return;
|
|
|
|
of_clk_parent_fill(np, parent_names, num_parents);
|
|
regmap = syscon_node_to_regmap(of_get_parent(np));
|
|
if (IS_ERR(regmap))
|
|
return;
|
|
|
|
of_property_read_string(np, "clock-output-names", &name);
|
|
|
|
clk = at91_clk_register_sam9260_slow(regmap, name, parent_names,
|
|
num_parents);
|
|
if (IS_ERR(clk))
|
|
return;
|
|
|
|
of_clk_add_provider(np, of_clk_src_simple_get, clk);
|
|
}
|
|
|
|
CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow",
|
|
of_at91sam9260_clk_slow_setup);
|