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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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![Linus Torvalds](/assets/img/avatar_default.png)
new device support in terms of LoC, but there has been some cleanup in the core as well as the usual minor clk additions to various drivers. Core: - parent tracking has been simplified - CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started - of_clk_init() doesn't consider disabled DT nodes anymore - clk_unregister() had an error path bug squashed - of_clk_get_parent_count() has been fixed to only return unsigned ints - HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone New Drivers: - NXP LPC18xx creg - QCOM IPQ4019 GCC - TI dm814x ADPLL - i.MX6QP Updates: - Cyngus audio clks found on Broadcom iProc devices - Non-critical fixes for BCM2385 PLLs - Samsung exynos5433 updates for clk id errors, HDMI support, suspend/resume simplifications - USB, CAN, LVDS, and FCP clks on shmobile devices - sunxi got support for more clks on new SoCs and went through a minor refactoring/rewrite to use a simpler factor clk construct - rockchip added some more clk ids and added suport for fraction dividers - QCOM GDSCs in msm8996 - A new devm helper to make adding custom actions simpler (acked by Greg) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABCAAGBQJW8fPZAAoJENidgRMleOc9sc0P/2b4k8FiFwjMXiiXI1rcEjiz ZjeVxzyAcwBiYoL8a2XONd+pihjLNcAbDbjk8SGUzmKDDz7elQbrhby/6o1dPlW/ fQEQFa8Xa8zhZgidO1AFc1DmIcPg/u/Z58wHbjIcqDjvzKA63213Ud34NJsRtF6y +EJrIUZiTtj5q1pJgDmqlOv6ImmQtgW/AN51vNXCNNCyS9OsSgQm0DK5/f485HNc 2y5NE5hpijso69HFet5chuT3DiDLz/0dxmgCm/w9CRRzkHxYl3lxV/v07B+rZBo5 cWplFfvJqX7PvQtcP0sPPzZUfGT/vOeTboWprQwI4R3RObS18xLqlq6DEvOTmnqW Jh+9uNBq4+kwSz5GcYjpwvj7+W0FPgIaBVRHrEW9qeXkgDpYloPtnEt8C8GmO6Bt O0bgIzETq9mnRTA+VesIfjmTa4IYRDDUoDwGTw5CnW3jaZmtYJh8GhgZulMfPfyK vfWQkY2OesXFwct0rU8tFiswTPeTRgXqL3AsPYjTPAHx1kfBpvfOQTCzzT7eSBr7 jykd9EXsXrYb/rpIxW7j6KjPpaWu+EouK06wc4TIBGrrWVTIV0ZvybzOBgf0FnpS UDx87OyQb8x9TDMrfKf6bmJyly8y1dXkutFYY4XKIGUydlXIf0kn7AnIXW6SR7mX fTEdLFMZ03ViCojtah5r =bZFY -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The clk changes for this release cycle are mostly dominated by new device support in terms of LoC, but there has been some cleanup in the core as well as the usual minor clk additions to various drivers. Core: - parent tracking has been simplified - CLK_IS_ROOT is now a no-op flag, cleaning up drivers has started - of_clk_init() doesn't consider disabled DT nodes anymore - clk_unregister() had an error path bug squashed - of_clk_get_parent_count() has been fixed to only return unsigned ints - HAVE_MACH_CLKDEV is removed now that the last arch user (ARM) is gone New Drivers: - NXP LPC18xx creg - QCOM IPQ4019 GCC - TI dm814x ADPLL - i.MX6QP Updates: - Cyngus audio clks found on Broadcom iProc devices - Non-critical fixes for BCM2385 PLLs - Samsung exynos5433 updates for clk id errors, HDMI support, suspend/resume simplifications - USB, CAN, LVDS, and FCP clks on shmobile devices - sunxi got support for more clks on new SoCs and went through a minor refactoring/rewrite to use a simpler factor clk construct - rockchip added some more clk ids and added suport for fraction dividers - QCOM GDSCs in msm8996 - A new devm helper to make adding custom actions simpler (acked by Greg)" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (197 commits) clk: bcm2835: fix check of error code returned by devm_ioremap_resource() clk: renesas: div6: use RENESAS for #define clk: renesas: Rename header file renesas.h clk: max77{686,802}: Remove CLK_IS_ROOT clk: versatile: Remove CLK_IS_ROOT clk: sunxi: Remove use of variable length array clk: fixed-rate: Remove CLK_IS_ROOT clk: qcom: Remove CLK_IS_ROOT doc: dt: add documentation for lpc1850-creg-clk driver clk: add lpc18xx creg clk driver clk: lpc32xx: fix compilation warning clk: xgene: Add missing parenthesis when clearing divider value clk: mb86s7x: Remove CLK_IS_ROOT clk: x86: Remove clkdev.h and clk.h includes clk: x86: Remove CLK_IS_ROOT clk: mvebu: Remove CLK_IS_ROOT clk: renesas: move drivers to renesas directory clk: si5{14,351,70}: Remove CLK_IS_ROOT clk: scpi: Remove CLK_IS_ROOT clk: s2mps11: Remove CLK_IS_ROOT ...
170 lines
4.1 KiB
C
170 lines
4.1 KiB
C
/*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/at91_pmc.h>
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#include <linux/of.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include "pmc.h"
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#define SMD_SOURCE_MAX 2
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#define SMD_DIV_SHIFT 8
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#define SMD_MAX_DIV 0xf
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struct at91sam9x5_clk_smd {
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struct clk_hw hw;
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struct regmap *regmap;
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};
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#define to_at91sam9x5_clk_smd(hw) \
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container_of(hw, struct at91sam9x5_clk_smd, hw)
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static unsigned long at91sam9x5_clk_smd_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw);
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unsigned int smdr;
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u8 smddiv;
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regmap_read(smd->regmap, AT91_PMC_SMD, &smdr);
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smddiv = (smdr & AT91_PMC_SMD_DIV) >> SMD_DIV_SHIFT;
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return parent_rate / (smddiv + 1);
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}
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static long at91sam9x5_clk_smd_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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unsigned long div;
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unsigned long bestrate;
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unsigned long tmp;
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if (rate >= *parent_rate)
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return *parent_rate;
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div = *parent_rate / rate;
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if (div > SMD_MAX_DIV)
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return *parent_rate / (SMD_MAX_DIV + 1);
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bestrate = *parent_rate / div;
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tmp = *parent_rate / (div + 1);
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if (bestrate - rate > rate - tmp)
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bestrate = tmp;
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return bestrate;
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}
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static int at91sam9x5_clk_smd_set_parent(struct clk_hw *hw, u8 index)
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{
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struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw);
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if (index > 1)
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return -EINVAL;
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regmap_update_bits(smd->regmap, AT91_PMC_SMD, AT91_PMC_SMDS,
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index ? AT91_PMC_SMDS : 0);
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return 0;
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}
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static u8 at91sam9x5_clk_smd_get_parent(struct clk_hw *hw)
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{
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struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw);
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unsigned int smdr;
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regmap_read(smd->regmap, AT91_PMC_SMD, &smdr);
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return smdr & AT91_PMC_SMDS;
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}
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static int at91sam9x5_clk_smd_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw);
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unsigned long div = parent_rate / rate;
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if (parent_rate % rate || div < 1 || div > (SMD_MAX_DIV + 1))
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return -EINVAL;
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regmap_update_bits(smd->regmap, AT91_PMC_SMD, AT91_PMC_SMD_DIV,
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(div - 1) << SMD_DIV_SHIFT);
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return 0;
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}
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static const struct clk_ops at91sam9x5_smd_ops = {
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.recalc_rate = at91sam9x5_clk_smd_recalc_rate,
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.round_rate = at91sam9x5_clk_smd_round_rate,
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.get_parent = at91sam9x5_clk_smd_get_parent,
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.set_parent = at91sam9x5_clk_smd_set_parent,
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.set_rate = at91sam9x5_clk_smd_set_rate,
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};
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static struct clk * __init
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at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
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const char **parent_names, u8 num_parents)
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{
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struct at91sam9x5_clk_smd *smd;
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struct clk *clk = NULL;
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struct clk_init_data init;
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smd = kzalloc(sizeof(*smd), GFP_KERNEL);
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if (!smd)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &at91sam9x5_smd_ops;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
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smd->hw.init = &init;
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smd->regmap = regmap;
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clk = clk_register(NULL, &smd->hw);
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if (IS_ERR(clk))
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kfree(smd);
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return clk;
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}
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static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
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{
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struct clk *clk;
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unsigned int num_parents;
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const char *parent_names[SMD_SOURCE_MAX];
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const char *name = np->name;
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struct regmap *regmap;
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num_parents = of_clk_get_parent_count(np);
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if (num_parents == 0 || num_parents > SMD_SOURCE_MAX)
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return;
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of_clk_parent_fill(np, parent_names, num_parents);
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of_property_read_string(np, "clock-output-names", &name);
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regmap = syscon_node_to_regmap(of_get_parent(np));
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if (IS_ERR(regmap))
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return;
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clk = at91sam9x5_clk_register_smd(regmap, name, parent_names,
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num_parents);
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if (IS_ERR(clk))
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return;
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of_clk_add_provider(np, of_clk_src_simple_get, clk);
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}
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CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd",
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of_at91sam9x5_clk_smd_setup);
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