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2025cf9e19
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 263 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
37 lines
1 KiB
C
37 lines
1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* This header provides constants for Tegra pinctrl bindings.
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*
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* Author: Laxman Dewangan <ldewangan@nvidia.com>
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*/
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#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
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#define _DT_BINDINGS_PINCTRL_TEGRA_H
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/*
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* Enable/disable for diffeent dt properties. This is applicable for
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* properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
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* nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
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*/
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#define TEGRA_PIN_DISABLE 0
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#define TEGRA_PIN_ENABLE 1
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#define TEGRA_PIN_PULL_NONE 0
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#define TEGRA_PIN_PULL_DOWN 1
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#define TEGRA_PIN_PULL_UP 2
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/* Low power mode driver */
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#define TEGRA_PIN_LP_DRIVE_DIV_8 0
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#define TEGRA_PIN_LP_DRIVE_DIV_4 1
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#define TEGRA_PIN_LP_DRIVE_DIV_2 2
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#define TEGRA_PIN_LP_DRIVE_DIV_1 3
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/* Rising/Falling slew rate */
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#define TEGRA_PIN_SLEW_RATE_FASTEST 0
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#define TEGRA_PIN_SLEW_RATE_FAST 1
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#define TEGRA_PIN_SLEW_RATE_SLOW 2
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#define TEGRA_PIN_SLEW_RATE_SLOWEST 3
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#endif
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