linux-stable/arch/riscv
Conor Dooley d161600625 riscv: dts: sifive: add missing #interrupt-cells to pmic
[ Upstream commit ce6b6d1513 ]

At W=2 dtc complains:
hifive-unmatched-a00.dts:120.10-238.4: Warning (interrupt_provider): /soc/i2c@10030000/pmic@58: Missing '#interrupt-cells' in interrupt provider

Add the missing property.

Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-03-26 18:17:52 -04:00
..
boot riscv: dts: sifive: add missing #interrupt-cells to pmic 2024-03-26 18:17:52 -04:00
configs
errata
include riscv: Fix enabling cbo.zero when running in M-mode 2024-03-06 14:53:57 +00:00
kernel riscv: Fix enabling cbo.zero when running in M-mode 2024-03-06 14:53:57 +00:00
kvm RISCV: KVM: update external interrupt atomically for IMSIC swfile 2023-12-13 11:59:52 +05:30
lib
mm riscv: Fix build error if !CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION 2024-03-06 14:53:52 +00:00
net
purgatory
tools
Kbuild
Kconfig RISC-V: Drop invalid test from CONFIG_AS_HAS_OPTION_ARCH 2024-03-06 14:53:56 +00:00
Kconfig.debug
Kconfig.errata
Kconfig.socs
Makefile
Makefile.postlink