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ffb910d7b8
With commit 02b4e2756e ("ARM: v7 setup
function should invalidate L1 cache"), the default secondary_startup
function for ARMv7 CPUs does invalidate the L1 cache, which was the sole
reason why BCM63xx had to have its own secondary_startup implementation.
Now that the secondary_startup takes care of this, we can completely
remove that code.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
8 lines
161 B
C
8 lines
161 B
C
#ifndef __BCM63XX_SMP_H
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#define __BCM63XX_SMP_H
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struct device_node;
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extern int bcm63xx_pmb_power_on_cpu(struct device_node *dn);
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#endif /* __BCM63XX_SMP_H */
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