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f73419bb89
This patch does some preparation works to extend batched TLB flush to arm64. Including: - Extend set_tlb_ubc_flush_pending() and arch_tlbbatch_add_mm() to accept an additional argument for address, architectures like arm64 may need this for tlbi. - Rename arch_tlbbatch_add_mm() to arch_tlbbatch_add_pending() to match its current function since we don't need to handle mm on architectures like arm64 and add_mm is not proper, add_pending will make sense to both as on x86 we're pending the TLB flush operations while on arm64 we're pending the synchronize operations. This intends no functional changes on x86. Link: https://lkml.kernel.org/r/20230717131004.12662-3-yangyicong@huawei.com Tested-by: Yicong Yang <yangyicong@hisilicon.com> Tested-by: Xin Hao <xhao@linux.alibaba.com> Tested-by: Punit Agrawal <punit.agrawal@bytedance.com> Signed-off-by: Barry Song <v-songbaohua@oppo.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com> Reviewed-by: Xin Hao <xhao@linux.alibaba.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Nadav Amit <namit@vmware.com> Cc: Mel Gorman <mgorman@suse.de> Cc: Anshuman Khandual <khandual@linux.vnet.ibm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Barry Song <baohua@kernel.org> Cc: Darren Hart <darren@os.amperecomputing.com> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: lipeifeng <lipeifeng@oppo.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ryan Roberts <ryan.roberts@arm.com> Cc: Steven Miao <realmz6@gmail.com> Cc: Will Deacon <will@kernel.org> Cc: Zeng Tao <prime.zeng@hisilicon.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
74 lines
2 KiB
C
74 lines
2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _LINUX_MM_TYPES_TASK_H
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#define _LINUX_MM_TYPES_TASK_H
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/*
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* Here are the definitions of the MM data types that are embedded in 'struct task_struct'.
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*
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* (These are defined separately to decouple sched.h from mm_types.h as much as possible.)
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*/
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#include <linux/types.h>
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#include <linux/threads.h>
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#include <linux/atomic.h>
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#include <linux/cpumask.h>
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#include <asm/page.h>
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#ifdef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
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#include <asm/tlbbatch.h>
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#endif
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#define USE_SPLIT_PTE_PTLOCKS (NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS)
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#define USE_SPLIT_PMD_PTLOCKS (USE_SPLIT_PTE_PTLOCKS && \
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IS_ENABLED(CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK))
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#define ALLOC_SPLIT_PTLOCKS (SPINLOCK_SIZE > BITS_PER_LONG/8)
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/*
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* When updating this, please also update struct resident_page_types[] in
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* kernel/fork.c
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*/
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enum {
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MM_FILEPAGES, /* Resident file mapping pages */
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MM_ANONPAGES, /* Resident anonymous pages */
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MM_SWAPENTS, /* Anonymous swap entries */
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MM_SHMEMPAGES, /* Resident shared memory pages */
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NR_MM_COUNTERS
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};
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struct page_frag {
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struct page *page;
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#if (BITS_PER_LONG > 32) || (PAGE_SIZE >= 65536)
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__u32 offset;
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__u32 size;
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#else
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__u16 offset;
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__u16 size;
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#endif
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};
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/* Track pages that require TLB flushes */
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struct tlbflush_unmap_batch {
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#ifdef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
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/*
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* The arch code makes the following promise: generic code can modify a
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* PTE, then call arch_tlbbatch_add_pending() (which internally provides
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* all needed barriers), then call arch_tlbbatch_flush(), and the entries
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* will be flushed on all CPUs by the time that arch_tlbbatch_flush()
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* returns.
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*/
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struct arch_tlbflush_unmap_batch arch;
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/* True if a flush is needed. */
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bool flush_required;
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/*
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* If true then the PTE was dirty when unmapped. The entry must be
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* flushed before IO is initiated or a stale TLB entry potentially
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* allows an update without redirtying the page.
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*/
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bool writable;
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#endif
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};
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#endif /* _LINUX_MM_TYPES_TASK_H */
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