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In order to be able to support the LPAE, the internal registers virtual base must be aligned to 2MB. In LPAE section size is 2MB, in earlyprintk we map the internal registers and it must be section aligned. Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
25 lines
698 B
ArmAsm
25 lines
698 B
ArmAsm
/*
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* Early serial output macro for Marvell SoC
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*
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* Copyright (C) 2012 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Gregory Clement <gregory.clement@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
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#define ARMADA_370_XP_REGS_VIRT_BASE 0xfec00000
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.macro addruart, rp, rv, tmp
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ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE
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ldr \rv, =ARMADA_370_XP_REGS_VIRT_BASE
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orr \rp, \rp, #0x00012000
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orr \rv, \rv, #0x00012000
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.endm
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#define UART_SHIFT 2
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#include <asm/hardware/debug-8250.S>
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