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The AST2600 pinmux is fairly similar to the previous generations of ASPEED BMC SoCs in terms of architecture, though differ in some of the design details. The complexity of the pin expressions is largely reduced (e.g. there are no-longer signals with multiple expressions muxing them to the associated pin), and there are now signals and buses with multiple pin groups. The driver implements pinmux support for all 244 GPIO-capable pins plus a further four pins that are not GPIO capable but which expose multiple signals. pinconf will be implemented in a follow-up patch. The implementation has been smoke-tested under qemu, and run on hardware by ASPEED. Debugged-by: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190711041942.23202-7-andrew@aj.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 lines
343 B
Makefile
8 lines
343 B
Makefile
# SPDX-License-Identifier: GPL-2.0-only
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# Aspeed pinctrl support
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ccflags-y += $(call cc-option,-Woverride-init)
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obj-$(CONFIG_PINCTRL_ASPEED) += pinctrl-aspeed.o pinmux-aspeed.o
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obj-$(CONFIG_PINCTRL_ASPEED_G4) += pinctrl-aspeed-g4.o
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obj-$(CONFIG_PINCTRL_ASPEED_G5) += pinctrl-aspeed-g5.o
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obj-$(CONFIG_PINCTRL_ASPEED_G6) += pinctrl-aspeed-g6.o
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