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Meson A1 SoC share the same register layout of pinmux with previous Meson-G12A, however there is difference for gpio and pin config register in A1. The main difference is that registers before A1 are grouped by function while those of A1 are by bank. The new register layout is as below: /* first bank */ /* addr */ - P_PADCTRL_GPIOP_I base + 0x00 << 2 - P_PADCTRL_GPIOP_O base + 0x01 << 2 - P_PADCTRL_GPIOP_OEN base + 0x02 << 2 - P_PADCTRL_GPIOP_PULL_EN base + 0x03 << 2 - P_PADCTRL_GPIOP_PULL_UP base + 0x04 << 2 - P_PADCTRL_GPIOP_DS base + 0x05 << 2 /* second bank */ - P_PADCTRL_GPIOB_I base + 0x10 << 2 - P_PADCTRL_GPIOB_O base + 0x11 << 2 - P_PADCTRL_GPIOB_OEN base + 0x12 << 2 - P_PADCTRL_GPIOB_PULL_EN base + 0x13 << 2 - P_PADCTRL_GPIOB_PULL_UP base + 0x14 << 2 - P_PADCTRL_GPIOB_DS base + 0x15 << 2 Each bank contains at least 6 registers to be configured, if one bank has more than 16 gpios, an extra P_PADCTRL_GPIO[X]_DS_EXT is included. Between two adjacent P_PADCTRL_GPIO[X]_I, there is an offset 0x10, that is to say, for third bank, the offsets will be 0x20,0x21,0x22,0x23,0x24 ,0x25 according to above register layout. For previous chips, registers are grouped according to their functions while registers of A1 are according to bank.Also note that there is no AO bank any more in A1. Current Meson pinctrl driver can cover such change by using base address of GPIO as that of drive-strength. While simply giving reg_ds = reg_pullen make wrong value to reg_ds for Socs that do not support drive-strength like AXG.To make things simple, add an extra dt parser function for a1 and remain the old dt parser function for only reg parsing. Signed-off-by: Qianggui Song <qianggui.song@amlogic.com> Link: https://lore.kernel.org/r/1573819429-6937-3-git-send-email-qianggui.song@amlogic.com Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
11 lines
584 B
Makefile
11 lines
584 B
Makefile
# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_PINCTRL_MESON) += pinctrl-meson.o
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obj-$(CONFIG_PINCTRL_MESON8_PMX) += pinctrl-meson8-pmx.o
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obj-$(CONFIG_PINCTRL_MESON8) += pinctrl-meson8.o
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obj-$(CONFIG_PINCTRL_MESON8B) += pinctrl-meson8b.o
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obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o
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obj-$(CONFIG_PINCTRL_MESON_GXL) += pinctrl-meson-gxl.o
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obj-$(CONFIG_PINCTRL_MESON_AXG_PMX) += pinctrl-meson-axg-pmx.o
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obj-$(CONFIG_PINCTRL_MESON_AXG) += pinctrl-meson-axg.o
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obj-$(CONFIG_PINCTRL_MESON_G12A) += pinctrl-meson-g12a.o
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obj-$(CONFIG_PINCTRL_MESON_A1) += pinctrl-meson-a1.o
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