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2025cf9e19
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 263 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
123 lines
3.1 KiB
C
123 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* intel_soc_dts_thermal.c
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* Copyright (c) 2014, Intel Corporation.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/acpi.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include "intel_soc_dts_iosf.h"
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#define CRITICAL_OFFSET_FROM_TJ_MAX 5000
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static int crit_offset = CRITICAL_OFFSET_FROM_TJ_MAX;
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module_param(crit_offset, int, 0644);
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MODULE_PARM_DESC(crit_offset,
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"Critical Temperature offset from tj max in millidegree Celsius.");
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/* IRQ 86 is a fixed APIC interrupt for BYT DTS Aux threshold notifications */
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#define BYT_SOC_DTS_APIC_IRQ 86
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static int soc_dts_thres_gsi;
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static int soc_dts_thres_irq;
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static struct intel_soc_dts_sensors *soc_dts;
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static irqreturn_t soc_irq_thread_fn(int irq, void *dev_data)
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{
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pr_debug("proc_thermal_interrupt\n");
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intel_soc_dts_iosf_interrupt_handler(soc_dts);
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return IRQ_HANDLED;
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}
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static const struct x86_cpu_id soc_thermal_ids[] = {
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT, 0,
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BYT_SOC_DTS_APIC_IRQ},
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, soc_thermal_ids);
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static int __init intel_soc_thermal_init(void)
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{
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int err = 0;
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const struct x86_cpu_id *match_cpu;
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match_cpu = x86_match_cpu(soc_thermal_ids);
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if (!match_cpu)
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return -ENODEV;
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/* Create a zone with 2 trips with marked as read only */
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soc_dts = intel_soc_dts_iosf_init(INTEL_SOC_DTS_INTERRUPT_APIC, 2, 1);
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if (IS_ERR(soc_dts)) {
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err = PTR_ERR(soc_dts);
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return err;
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}
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soc_dts_thres_gsi = (int)match_cpu->driver_data;
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if (soc_dts_thres_gsi) {
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/*
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* Note the flags here MUST match the firmware defaults, rather
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* then the request_irq flags, otherwise we get an EBUSY error.
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*/
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soc_dts_thres_irq = acpi_register_gsi(NULL, soc_dts_thres_gsi,
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ACPI_LEVEL_SENSITIVE,
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ACPI_ACTIVE_LOW);
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if (soc_dts_thres_irq < 0) {
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pr_warn("intel_soc_dts: Could not get IRQ for GSI %d, err %d\n",
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soc_dts_thres_gsi, soc_dts_thres_irq);
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soc_dts_thres_irq = 0;
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}
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}
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if (soc_dts_thres_irq) {
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err = request_threaded_irq(soc_dts_thres_irq, NULL,
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soc_irq_thread_fn,
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IRQF_TRIGGER_RISING | IRQF_ONESHOT,
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"soc_dts", soc_dts);
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if (err) {
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/*
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* Do not just error out because the user space thermal
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* daemon such as DPTF may use polling instead of being
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* interrupt driven.
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*/
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pr_warn("request_threaded_irq ret %d\n", err);
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}
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}
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err = intel_soc_dts_iosf_add_read_only_critical_trip(soc_dts,
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crit_offset);
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if (err)
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goto error_trips;
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return 0;
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error_trips:
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if (soc_dts_thres_irq) {
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free_irq(soc_dts_thres_irq, soc_dts);
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acpi_unregister_gsi(soc_dts_thres_gsi);
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}
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intel_soc_dts_iosf_exit(soc_dts);
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return err;
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}
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static void __exit intel_soc_thermal_exit(void)
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{
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if (soc_dts_thres_irq) {
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free_irq(soc_dts_thres_irq, soc_dts);
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acpi_unregister_gsi(soc_dts_thres_gsi);
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}
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intel_soc_dts_iosf_exit(soc_dts);
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}
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module_init(intel_soc_thermal_init)
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module_exit(intel_soc_thermal_exit)
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MODULE_DESCRIPTION("Intel SoC DTS Thermal Driver");
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MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
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MODULE_LICENSE("GPL v2");
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