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efeeaefe9b
Introduces a driver for the LogiCVC display controller, a programmable logic controller optimized for use in Xilinx Zynq-7000 SoCs and other Xilinx FPGAs. The controller is mostly configured at logic synthesis time so only a subset of configuration is left for the driver to handle. The following features are implemented and tested: - LVDS 4-bit interface; - RGB565 pixel formats; - Multiple layers and hardware composition; - Layer-wide alpha mode; The following features are implemented but untested: - Other RGB pixel formats; - Layer framebuffer configuration for version 4; - Lowest-layer used as background color; - Per-pixel alpha mode. The following features are not implemented: - YUV pixel formats; - DVI, LVDS 3-bit, ITU656 and camera link interfaces; - External parallel input for layer; - Color-keying; - LUT-based alpha modes. Additional implementation-specific notes: - Panels are only enabled after the first page flip to avoid flashing a white screen. - Depth used in context of the LogiCVC driver only counts color components to match the definition of the synthesis parameters. Support is implemented for both version 3 and 4 of the controller. With version 3, framebuffers are stored in a dedicated contiguous memory area, with a base address hardcoded for each layer. This requires using a dedicated CMA pool registered at the base address and tweaking a few offset-related registers to try to use any buffer allocated from the pool. This is done on a best-effort basis to have the hardware cope with the DRM framebuffer allocation model and there is no guarantee that each buffer allocated by GEM CMA can be used for any layer. In particular, buffers allocated below the base address for a layer are guaranteed not to be configurable for that layer. See the implementation of logicvc_layer_buffer_find_setup for specifics. Version 4 allows configuring each buffer address directly, which guarantees that any buffer can be configured. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220520141555.1429041-2-paul.kocialkowski@bootlin.com
80 lines
2 KiB
C
80 lines
2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019-2022 Bootlin
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* Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
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*/
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#include <linux/types.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_mode_config.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_print.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_vblank.h>
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#include "logicvc_drm.h"
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#include "logicvc_interface.h"
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#include "logicvc_layer.h"
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#include "logicvc_mode.h"
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static const struct drm_mode_config_funcs logicvc_mode_config_funcs = {
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.fb_create = drm_gem_fb_create,
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.output_poll_changed = drm_fb_helper_output_poll_changed,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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};
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int logicvc_mode_init(struct logicvc_drm *logicvc)
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{
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struct drm_device *drm_dev = &logicvc->drm_dev;
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struct drm_mode_config *mode_config = &drm_dev->mode_config;
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struct logicvc_layer *layer_primary;
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uint32_t preferred_depth;
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int ret;
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ret = drm_vblank_init(drm_dev, mode_config->num_crtc);
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if (ret) {
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drm_err(drm_dev, "Failed to initialize vblank\n");
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return ret;
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}
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layer_primary = logicvc_layer_get_primary(logicvc);
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if (!layer_primary) {
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drm_err(drm_dev, "Failed to get primary layer\n");
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return -EINVAL;
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}
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preferred_depth = layer_primary->formats->depth;
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/* DRM counts alpha in depth, our driver doesn't. */
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if (layer_primary->formats->alpha)
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preferred_depth += 8;
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mode_config->min_width = 64;
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mode_config->max_width = 2048;
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mode_config->min_height = 1;
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mode_config->max_height = 2048;
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mode_config->preferred_depth = preferred_depth;
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mode_config->funcs = &logicvc_mode_config_funcs;
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drm_mode_config_reset(drm_dev);
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drm_kms_helper_poll_init(drm_dev);
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return 0;
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}
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void logicvc_mode_fini(struct logicvc_drm *logicvc)
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{
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struct drm_device *drm_dev = &logicvc->drm_dev;
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drm_kms_helper_poll_fini(drm_dev);
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}
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