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![Linus Walleij](/assets/img/avatar_default.png)
The DaVinci MUSB glue contains an optional GPIO line to control VBUS power, convert this to use a GPIO descriptor and augment the EVM board file to provide this descriptor. I can't get this driver to compile properly and it depends on broken but when I didn get it to compile brokenly, it did at least not complain about THIS code being broken so I don't think I broke the driver any more than what it already is. I did away with the ifdefs that do not work with multiplatform anyway so the day someone decides to resurrect the code, the path to get it working should be easier as well since DaVinci is now multiplatform. Cc: Sekhar Nori <nsekhar@ti.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> [b-liu@ti.com: fixed one instance still ref to global variable vbus_state] Signed-off-by: Bin Liu <b-liu@ti.com> Link: https://lore.kernel.org/r/20200115132547.364-25-b-liu@ti.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
606 lines
17 KiB
C
606 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2005-2006 by Texas Instruments
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*
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* This file is part of the Inventra Controller Driver for Linux.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/list.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/gpio/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/usb/usb_phy_generic.h>
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#include <mach/cputype.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include "musb_core.h"
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#include "davinci.h"
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#include "cppi_dma.h"
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#define USB_PHY_CTRL IO_ADDRESS(USBPHY_CTL_PADDR)
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#define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
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struct davinci_glue {
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struct device *dev;
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struct platform_device *musb;
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struct clk *clk;
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bool vbus_state;
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struct gpio_desc *vbus;
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struct work_struct vbus_work;
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};
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/* REVISIT (PM) we should be able to keep the PHY in low power mode most
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* of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
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* and, when in host mode, autosuspending idle root ports... PHYPLLON
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* (overriding SUSPENDM?) then likely needs to stay off.
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*/
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static inline void phy_on(void)
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{
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u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
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/* power everything up; start the on-chip PHY and its PLL */
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phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
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phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
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__raw_writel(phy_ctrl, USB_PHY_CTRL);
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/* wait for PLL to lock before proceeding */
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while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0)
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cpu_relax();
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}
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static inline void phy_off(void)
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{
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u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
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/* powerdown the on-chip PHY, its PLL, and the OTG block */
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phy_ctrl &= ~(USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON);
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phy_ctrl |= USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN;
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__raw_writel(phy_ctrl, USB_PHY_CTRL);
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}
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static int dma_off = 1;
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static void davinci_musb_enable(struct musb *musb)
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{
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u32 tmp, old, val;
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/* workaround: setup irqs through both register sets */
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tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK)
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<< DAVINCI_USB_TXINT_SHIFT;
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musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
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old = tmp;
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tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK))
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<< DAVINCI_USB_RXINT_SHIFT;
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musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
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tmp |= old;
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val = ~MUSB_INTR_SOF;
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tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT);
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musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
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if (is_dma_capable() && !dma_off)
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printk(KERN_WARNING "%s %s: dma not reactivated\n",
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__FILE__, __func__);
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else
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dma_off = 0;
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/* force a DRVVBUS irq so we can start polling for ID change */
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musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
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DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
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}
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/*
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* Disable the HDRC and flush interrupts
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*/
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static void davinci_musb_disable(struct musb *musb)
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{
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/* because we don't set CTRLR.UINT, "important" to:
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* - not read/write INTRUSB/INTRUSBE
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* - (except during initial setup, as workaround)
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* - use INTSETR/INTCLRR instead
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*/
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musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG,
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DAVINCI_USB_USBINT_MASK
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| DAVINCI_USB_TXINT_MASK
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| DAVINCI_USB_RXINT_MASK);
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musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
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if (is_dma_capable() && !dma_off)
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WARNING("dma still active\n");
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}
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#define portstate(stmt) stmt
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/*
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* VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM,
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* which doesn't wire DRVVBUS to the FET that switches it. Unclear
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* if that's a problem with the DM6446 chip or just with that board.
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*
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* In either case, the DM355 EVM automates DRVVBUS the normal way,
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* when J10 is out, and TI documents it as handling OTG.
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*/
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/* I2C operations are always synchronous, and require a task context.
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* With unloaded systems, using the shared workqueue seems to suffice
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* to satisfy the 100msec A_WAIT_VRISE timeout...
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*/
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static void evm_deferred_drvvbus(struct work_struct *work)
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{
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struct davinci_glue *glue = container_of(work, struct davinci_glue,
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vbus_work);
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gpiod_set_value_cansleep(glue->vbus, glue->vbus_state);
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glue->vbus_state = !glue->vbus_state;
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}
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static void davinci_musb_source_power(struct musb *musb, int is_on,
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int immediate)
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{
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struct davinci_glue *glue = dev_get_drvdata(musb->controller->parent);
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/* This GPIO handling is entirely optional */
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if (!glue->vbus)
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return;
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if (is_on)
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is_on = 1;
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if (glue->vbus_state == is_on)
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return;
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/* 0/1 vs "-1 == unknown/init" */
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glue->vbus_state = !is_on;
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if (machine_is_davinci_evm()) {
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if (immediate)
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gpiod_set_value_cansleep(glue->vbus, glue->vbus_state);
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else
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schedule_work(&glue->vbus_work);
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}
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if (immediate)
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glue->vbus_state = is_on;
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}
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static void davinci_musb_set_vbus(struct musb *musb, int is_on)
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{
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WARN_ON(is_on && is_peripheral_active(musb));
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davinci_musb_source_power(musb, is_on, 0);
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}
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#define POLL_SECONDS 2
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static void otg_timer(struct timer_list *t)
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{
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struct musb *musb = from_timer(musb, t, dev_timer);
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void __iomem *mregs = musb->mregs;
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u8 devctl;
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unsigned long flags;
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/* We poll because DaVinci's won't expose several OTG-critical
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* status change events (from the transceiver) otherwise.
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*/
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devctl = musb_readb(mregs, MUSB_DEVCTL);
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dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl,
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usb_otg_state_string(musb->xceiv->otg->state));
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spin_lock_irqsave(&musb->lock, flags);
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switch (musb->xceiv->otg->state) {
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case OTG_STATE_A_WAIT_VFALL:
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/* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
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* seems to mis-handle session "start" otherwise (or in our
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* case "recover"), in routine "VBUS was valid by the time
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* VBUSERR got reported during enumeration" cases.
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*/
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if (devctl & MUSB_DEVCTL_VBUS) {
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mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
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break;
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}
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
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musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
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MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
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break;
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case OTG_STATE_B_IDLE:
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/*
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* There's no ID-changed IRQ, so we have no good way to tell
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* when to switch to the A-Default state machine (by setting
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* the DEVCTL.SESSION flag).
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*
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* Workaround: whenever we're in B_IDLE, try setting the
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* session flag every few seconds. If it works, ID was
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* grounded and we're now in the A-Default state machine.
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*
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* NOTE setting the session flag is _supposed_ to trigger
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* SRP, but clearly it doesn't.
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*/
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musb_writeb(mregs, MUSB_DEVCTL,
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devctl | MUSB_DEVCTL_SESSION);
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devctl = musb_readb(mregs, MUSB_DEVCTL);
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if (devctl & MUSB_DEVCTL_BDEVICE)
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mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
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else
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musb->xceiv->otg->state = OTG_STATE_A_IDLE;
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break;
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default:
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break;
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}
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spin_unlock_irqrestore(&musb->lock, flags);
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}
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static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
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{
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unsigned long flags;
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irqreturn_t retval = IRQ_NONE;
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struct musb *musb = __hci;
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struct usb_otg *otg = musb->xceiv->otg;
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void __iomem *tibase = musb->ctrl_base;
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struct cppi *cppi;
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u32 tmp;
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spin_lock_irqsave(&musb->lock, flags);
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/* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through
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* the Mentor registers (except for setup), use the TI ones and EOI.
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*
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* Docs describe irq "vector" registers associated with the CPPI and
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* USB EOI registers. These hold a bitmask corresponding to the
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* current IRQ, not an irq handler address. Would using those bits
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* resolve some of the races observed in this dispatch code??
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*/
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/* CPPI interrupts share the same IRQ line, but have their own
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* mask, state, "vector", and EOI registers.
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*/
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cppi = container_of(musb->dma_controller, struct cppi, controller);
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if (is_cppi_enabled(musb) && musb->dma_controller && !cppi->irq)
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retval = cppi_interrupt(irq, __hci);
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/* ack and handle non-CPPI interrupts */
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tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG);
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musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp);
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dev_dbg(musb->controller, "IRQ %08x\n", tmp);
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musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK)
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>> DAVINCI_USB_RXINT_SHIFT;
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musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK)
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>> DAVINCI_USB_TXINT_SHIFT;
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musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK)
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>> DAVINCI_USB_USBINT_SHIFT;
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/* DRVVBUS irqs are the only proxy we have (a very poor one!) for
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* DaVinci's missing ID change IRQ. We need an ID change IRQ to
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* switch appropriately between halves of the OTG state machine.
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* Managing DEVCTL.SESSION per Mentor docs requires we know its
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* value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
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* Also, DRVVBUS pulses for SRP (but not at 5V) ...
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*/
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if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
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int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
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void __iomem *mregs = musb->mregs;
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u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
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int err = musb->int_usb & MUSB_INTR_VBUSERROR;
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err = musb->int_usb & MUSB_INTR_VBUSERROR;
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if (err) {
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/* The Mentor core doesn't debounce VBUS as needed
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* to cope with device connect current spikes. This
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* means it's not uncommon for bus-powered devices
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* to get VBUS errors during enumeration.
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*
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* This is a workaround, but newer RTL from Mentor
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* seems to allow a better one: "re"starting sessions
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* without waiting (on EVM, a **long** time) for VBUS
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* to stop registering in devctl.
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*/
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musb->int_usb &= ~MUSB_INTR_VBUSERROR;
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
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mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
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WARNING("VBUS error workaround (delay coming)\n");
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} else if (drvvbus) {
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MUSB_HST_MODE(musb);
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
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portstate(musb->port1_status |= USB_PORT_STAT_POWER);
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del_timer(&musb->dev_timer);
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} else {
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musb->is_active = 0;
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MUSB_DEV_MODE(musb);
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musb->xceiv->otg->state = OTG_STATE_B_IDLE;
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portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
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}
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/* NOTE: this must complete poweron within 100 msec
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* (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
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*/
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davinci_musb_source_power(musb, drvvbus, 0);
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dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
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drvvbus ? "on" : "off",
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usb_otg_state_string(musb->xceiv->otg->state),
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err ? " ERROR" : "",
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devctl);
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retval = IRQ_HANDLED;
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}
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if (musb->int_tx || musb->int_rx || musb->int_usb)
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retval |= musb_interrupt(musb);
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/* irq stays asserted until EOI is written */
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musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
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/* poll for ID change */
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if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
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mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
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spin_unlock_irqrestore(&musb->lock, flags);
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return retval;
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}
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static int davinci_musb_set_mode(struct musb *musb, u8 mode)
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{
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/* EVM can't do this (right?) */
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return -EIO;
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}
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static int davinci_musb_init(struct musb *musb)
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{
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void __iomem *tibase = musb->ctrl_base;
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u32 revision;
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int ret = -ENODEV;
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musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
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if (IS_ERR_OR_NULL(musb->xceiv)) {
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ret = -EPROBE_DEFER;
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goto unregister;
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}
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musb->mregs += DAVINCI_BASE_OFFSET;
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/* returns zero if e.g. not clocked */
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revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
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if (revision == 0)
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goto fail;
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timer_setup(&musb->dev_timer, otg_timer, 0);
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davinci_musb_source_power(musb, 0, 1);
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/* dm355 EVM swaps D+/D- for signal integrity, and
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* is clocked from the main 24 MHz crystal.
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*/
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if (machine_is_davinci_dm355_evm()) {
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u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
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phy_ctrl &= ~(3 << 9);
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phy_ctrl |= USBPHY_DATAPOL;
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__raw_writel(phy_ctrl, USB_PHY_CTRL);
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}
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/* On dm355, the default-A state machine needs DRVVBUS control.
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* If we won't be a host, there's no need to turn it on.
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*/
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if (cpu_is_davinci_dm355()) {
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u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
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deepsleep &= ~DRVVBUS_FORCE;
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__raw_writel(deepsleep, DM355_DEEPSLEEP);
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}
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/* reset the controller */
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musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
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/* start the on-chip PHY and its PLL */
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phy_on();
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msleep(5);
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/* NOTE: irqs are in mixed mode, not bypass to pure-musb */
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pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
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revision, __raw_readl(USB_PHY_CTRL),
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musb_readb(tibase, DAVINCI_USB_CTRL_REG));
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musb->isr = davinci_musb_interrupt;
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return 0;
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fail:
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usb_put_phy(musb->xceiv);
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unregister:
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usb_phy_generic_unregister();
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return ret;
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}
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static int davinci_musb_exit(struct musb *musb)
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{
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int maxdelay = 30;
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u8 devctl, warn = 0;
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del_timer_sync(&musb->dev_timer);
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/* force VBUS off */
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if (cpu_is_davinci_dm355()) {
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u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
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deepsleep &= ~DRVVBUS_FORCE;
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deepsleep |= DRVVBUS_OVERRIDE;
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__raw_writel(deepsleep, DM355_DEEPSLEEP);
|
|
}
|
|
|
|
davinci_musb_source_power(musb, 0 /*off*/, 1);
|
|
|
|
/*
|
|
* delay, to avoid problems with module reload.
|
|
* if there's no peripheral connected, this can take a
|
|
* long time to fall, especially on EVM with huge C133.
|
|
*/
|
|
do {
|
|
devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
|
|
if (!(devctl & MUSB_DEVCTL_VBUS))
|
|
break;
|
|
if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
|
|
warn = devctl & MUSB_DEVCTL_VBUS;
|
|
dev_dbg(musb->controller, "VBUS %d\n",
|
|
warn >> MUSB_DEVCTL_VBUS_SHIFT);
|
|
}
|
|
msleep(1000);
|
|
maxdelay--;
|
|
} while (maxdelay > 0);
|
|
|
|
/* in OTG mode, another host might be connected */
|
|
if (devctl & MUSB_DEVCTL_VBUS)
|
|
dev_dbg(musb->controller, "VBUS off timeout (devctl %02x)\n", devctl);
|
|
|
|
phy_off();
|
|
|
|
usb_put_phy(musb->xceiv);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct musb_platform_ops davinci_ops = {
|
|
.quirks = MUSB_DMA_CPPI,
|
|
.init = davinci_musb_init,
|
|
.exit = davinci_musb_exit,
|
|
|
|
#ifdef CONFIG_USB_TI_CPPI_DMA
|
|
.dma_init = cppi_dma_controller_create,
|
|
.dma_exit = cppi_dma_controller_destroy,
|
|
#endif
|
|
.enable = davinci_musb_enable,
|
|
.disable = davinci_musb_disable,
|
|
|
|
.set_mode = davinci_musb_set_mode,
|
|
|
|
.set_vbus = davinci_musb_set_vbus,
|
|
};
|
|
|
|
static const struct platform_device_info davinci_dev_info = {
|
|
.name = "musb-hdrc",
|
|
.id = PLATFORM_DEVID_AUTO,
|
|
.dma_mask = DMA_BIT_MASK(32),
|
|
};
|
|
|
|
static int davinci_probe(struct platform_device *pdev)
|
|
{
|
|
struct resource musb_resources[3];
|
|
struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
|
|
struct platform_device *musb;
|
|
struct davinci_glue *glue;
|
|
struct platform_device_info pinfo;
|
|
struct clk *clk;
|
|
|
|
int ret = -ENOMEM;
|
|
|
|
glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
|
|
if (!glue)
|
|
goto err0;
|
|
|
|
clk = devm_clk_get(&pdev->dev, "usb");
|
|
if (IS_ERR(clk)) {
|
|
dev_err(&pdev->dev, "failed to get clock\n");
|
|
ret = PTR_ERR(clk);
|
|
goto err0;
|
|
}
|
|
|
|
ret = clk_enable(clk);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to enable clock\n");
|
|
goto err0;
|
|
}
|
|
|
|
glue->dev = &pdev->dev;
|
|
glue->clk = clk;
|
|
|
|
pdata->platform_ops = &davinci_ops;
|
|
|
|
glue->vbus = devm_gpiod_get_optional(&pdev->dev, NULL, GPIOD_OUT_LOW);
|
|
if (IS_ERR(glue->vbus)) {
|
|
ret = PTR_ERR(glue->vbus);
|
|
goto err0;
|
|
} else {
|
|
glue->vbus_state = -1;
|
|
INIT_WORK(&glue->vbus_work, evm_deferred_drvvbus);
|
|
}
|
|
|
|
usb_phy_generic_register();
|
|
platform_set_drvdata(pdev, glue);
|
|
|
|
memset(musb_resources, 0x00, sizeof(*musb_resources) *
|
|
ARRAY_SIZE(musb_resources));
|
|
|
|
musb_resources[0].name = pdev->resource[0].name;
|
|
musb_resources[0].start = pdev->resource[0].start;
|
|
musb_resources[0].end = pdev->resource[0].end;
|
|
musb_resources[0].flags = pdev->resource[0].flags;
|
|
|
|
musb_resources[1].name = pdev->resource[1].name;
|
|
musb_resources[1].start = pdev->resource[1].start;
|
|
musb_resources[1].end = pdev->resource[1].end;
|
|
musb_resources[1].flags = pdev->resource[1].flags;
|
|
|
|
/*
|
|
* For DM6467 3 resources are passed. A placeholder for the 3rd
|
|
* resource is always there, so it's safe to always copy it...
|
|
*/
|
|
musb_resources[2].name = pdev->resource[2].name;
|
|
musb_resources[2].start = pdev->resource[2].start;
|
|
musb_resources[2].end = pdev->resource[2].end;
|
|
musb_resources[2].flags = pdev->resource[2].flags;
|
|
|
|
pinfo = davinci_dev_info;
|
|
pinfo.parent = &pdev->dev;
|
|
pinfo.res = musb_resources;
|
|
pinfo.num_res = ARRAY_SIZE(musb_resources);
|
|
pinfo.data = pdata;
|
|
pinfo.size_data = sizeof(*pdata);
|
|
|
|
glue->musb = musb = platform_device_register_full(&pinfo);
|
|
if (IS_ERR(musb)) {
|
|
ret = PTR_ERR(musb);
|
|
dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
|
|
goto err1;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err1:
|
|
clk_disable(clk);
|
|
|
|
err0:
|
|
return ret;
|
|
}
|
|
|
|
static int davinci_remove(struct platform_device *pdev)
|
|
{
|
|
struct davinci_glue *glue = platform_get_drvdata(pdev);
|
|
|
|
platform_device_unregister(glue->musb);
|
|
usb_phy_generic_unregister();
|
|
clk_disable(glue->clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver davinci_driver = {
|
|
.probe = davinci_probe,
|
|
.remove = davinci_remove,
|
|
.driver = {
|
|
.name = "musb-davinci",
|
|
},
|
|
};
|
|
|
|
MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
|
|
MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
|
|
MODULE_LICENSE("GPL v2");
|
|
module_platform_driver(davinci_driver);
|