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![Greg Kroah-Hartman](/assets/img/avatar_default.png)
*) Add support in PHY core to create link between PHY consumer and PHY provider *) Add DisplayPort PHY configuration set to be used for negotiating the configurations to be used between DisplayPort controller and DisplayPort PHY *) Add PHY wrapper driver (configure inputs to Cadence Sierra PHY) for TI's J721E SoC and adapt Cadence Sierra PHY driver to be used for J721E SoC (Supports USB and PCIe) *) Add PHY driver for eMMC PHY in Intel LGM SoC *) Add PHY support for 7216 and 7211 Broadcom SoCs which uses the new Synopsys USB Controller *) Add support for 16nm SATA PHY present in Broadcom 7216 SoC *) Fix lost packet issue, fix MDIO from getting inaccessible, fix occasional transaction failures, fix USB driver from crashing in Broadcom USB PHY driver *) Fix missing PCS SW reset in UFS PHY of Qualcomm SM8150 *) Use "struct phy_configure_opts_mipi_dphy" to pass parameters from display controller to rockchip-inno-dsidphy *) Other cleanups including compile testing for some of the PHY drivers, fixing Kconfig indentation, duplicate writes in drivers etc., Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEEUXMr/TfP2p4suIY5Dlx4XIBNgtkFAl4hRU4OHGtpc2hvbkB0 aS5jb20ACgkQDlx4XIBNgtkSnw//a1zdT1NF2RApEAbSUcB+KHpckRLjKix4Q34r XexDI7/qVT1FQIDSOjxNOBhPVpATCE8O/pd71gVPUYqy67xmXhLK/FmBm90pzDYb JEt6zwaDoUaljFXN3OqXC1Z6q2hwRuKdERLQ0dajh8GAbkt0OOlzT8QXwv3m0YFg gUto2yytH8ZM/kdm3so1vc6vKtinW8QLlcigsgpaXVjQijeTaC5Wi1vxwgYeQE8K mHjipnCUl8mcuwKxAVFobSHxxSANWt6KJC0MOEB38xhsvylYgbE6ERoCHL5bERJA bsOJdiMAc3+UzlnbGlRNVTTkBReYWtSZ7MyHtjnPAl5xIpDk6/arPkX+KGzKTP/a MTC0XPHDXs2je+Nz2U2BRPecpjUkEDJ4rN1C8ZiqW6mJslsHmLE/NSax0uT9jX7V VK9Z6GJ2b7Yl/myf4DVyD6amN4EA8jK0U2q5tb3zI7boZG0RHauAfcStn1lKPBQV oBycIDPkcEbwOHRBimB3VIXJYcnVR0xEqiReU79tN2JZKKirlmkPmRfMVx2pS0Vc 5EvYigzVo0u0cC+Y7aEHpi4prEWaG+xw/6Y8l5QQ+BL4rJbNoL1281HT0m/v5YT2 x+N1uSDhc5vtRXGcSMadHl7DLDO9Wxh8WpI9bZ9aRvyy9xiUwAG/vaXSpoUIyOrH GRKuXXc= =76zg -----END PGP SIGNATURE----- Merge tag 'phy-for-5.6_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: phy: for 5.6 *) Add support in PHY core to create link between PHY consumer and PHY provider *) Add DisplayPort PHY configuration set to be used for negotiating the configurations to be used between DisplayPort controller and DisplayPort PHY *) Add PHY wrapper driver (configure inputs to Cadence Sierra PHY) for TI's J721E SoC and adapt Cadence Sierra PHY driver to be used for J721E SoC (Supports USB and PCIe) *) Add PHY driver for eMMC PHY in Intel LGM SoC *) Add PHY support for 7216 and 7211 Broadcom SoCs which uses the new Synopsys USB Controller *) Add support for 16nm SATA PHY present in Broadcom 7216 SoC *) Fix lost packet issue, fix MDIO from getting inaccessible, fix occasional transaction failures, fix USB driver from crashing in Broadcom USB PHY driver *) Fix missing PCS SW reset in UFS PHY of Qualcomm SM8150 *) Use "struct phy_configure_opts_mipi_dphy" to pass parameters from display controller to rockchip-inno-dsidphy *) Other cleanups including compile testing for some of the PHY drivers, fixing Kconfig indentation, duplicate writes in drivers etc., Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.6_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (54 commits) dt-bindings: phy: Add PHY_TYPE_DP definition phy: ti: j721e-wiz: Fix return value check in wiz_probe() dt-bindings: usb: Convert Allwinner A80 USB PHY controller to a schema phy: intel-lgm-emmc: Fix warning by adding missing MODULE_LICENSE phy: ti: j721e-wiz: Manage typec-gpio-dir dt-bindings: phy: ti,phy-j721e-wiz: Add Type-C dir GPIO phy: cadence: Sierra: add phy_reset hook phy: cadence: Sierra: remove redundant initialization of pointer regmap phy: Add DisplayPort configuration options phy: Enable compile testing for some of drivers phy: mediatek: Fix Kconfig indentation phy: intel-lgm-emmc: Add support for eMMC PHY dt-bindings: phy: intel-emmc-phy: Add YAML schema for LGM eMMC PHY phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC dt-bindings: phy: Document WIZ (SERDES wrapper) bindings phy: cadence: Sierra: Use correct dev pointer in cdns_sierra_phy_remove() phy: cadence: Sierra: Set cmn_refclk_dig_div/cmn_refclk1_dig_div frequency to 25MHz phy: cadence: Sierra: Change MAX_LANES of Sierra to 16 phy: cadence: Sierra: Check for PLL lock during PHY power on phy: cadence: Sierra: Get reset control "array" for each link ...
75 lines
1.5 KiB
C
75 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-1.0+
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/*
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* Renesas USB driver R-Car Gen. 2 initialization and power control
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*
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* Copyright (C) 2014 Ulrich Hecht
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* Copyright (C) 2019 Renesas Electronics Corporation
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*/
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#include <linux/phy/phy.h>
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#include "common.h"
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#include "rcar2.h"
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static int usbhs_rcar2_hardware_init(struct platform_device *pdev)
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{
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struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
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if (IS_ENABLED(CONFIG_GENERIC_PHY)) {
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struct phy *phy = phy_get(&pdev->dev, "usb");
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if (IS_ERR(phy))
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return PTR_ERR(phy);
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priv->phy = phy;
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return 0;
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}
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return -ENXIO;
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}
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static int usbhs_rcar2_hardware_exit(struct platform_device *pdev)
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{
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struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
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if (priv->phy) {
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phy_put(&pdev->dev, priv->phy);
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priv->phy = NULL;
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}
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return 0;
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}
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static int usbhs_rcar2_power_ctrl(struct platform_device *pdev,
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void __iomem *base, int enable)
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{
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struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
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int retval = -ENODEV;
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if (priv->phy) {
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if (enable) {
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retval = phy_init(priv->phy);
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if (!retval)
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retval = phy_power_on(priv->phy);
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} else {
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phy_power_off(priv->phy);
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phy_exit(priv->phy);
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retval = 0;
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}
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}
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return retval;
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}
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const struct renesas_usbhs_platform_info usbhs_rcar_gen2_plat_info = {
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.platform_callback = {
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.hardware_init = usbhs_rcar2_hardware_init,
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.hardware_exit = usbhs_rcar2_hardware_exit,
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.power_ctrl = usbhs_rcar2_power_ctrl,
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.get_id = usbhs_get_id_as_gadget,
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},
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.driver_param = {
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.has_usb_dmac = 1,
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.has_new_pipe_configs = 1,
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},
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};
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