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a61acbbe9c
Previously the (non-fd) fence returned from submit ioctl was a raw seqno, which is scoped to the ring. But from UABI standpoint, the ioctls related to seqno fences all specify a submitqueue. We can take advantage of that to replace the seqno fences with a cyclic idr handle. This is in preperation for moving to drm scheduler, at which point the submit ioctl will return after queuing the submit job to the scheduler, but before the submit is written into the ring (and therefore before a ring seqno has been assigned). Which means we need to replace the dma_fence that userspace may need to wait on with a scheduler fence. Signed-off-by: Rob Clark <robdclark@chromium.org> Acked-by: Christian König <christian.koenig@amd.com> Link: https://lore.kernel.org/r/20210728010632.2633470-8-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
103 lines
2.3 KiB
C
103 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2013-2016 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#include <linux/dma-fence.h>
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#include "msm_drv.h"
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#include "msm_fence.h"
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struct msm_fence_context *
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msm_fence_context_alloc(struct drm_device *dev, volatile uint32_t *fenceptr,
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const char *name)
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{
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struct msm_fence_context *fctx;
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fctx = kzalloc(sizeof(*fctx), GFP_KERNEL);
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if (!fctx)
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return ERR_PTR(-ENOMEM);
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fctx->dev = dev;
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strncpy(fctx->name, name, sizeof(fctx->name));
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fctx->context = dma_fence_context_alloc(1);
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fctx->fenceptr = fenceptr;
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spin_lock_init(&fctx->spinlock);
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return fctx;
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}
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void msm_fence_context_free(struct msm_fence_context *fctx)
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{
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kfree(fctx);
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}
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static inline bool fence_completed(struct msm_fence_context *fctx, uint32_t fence)
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{
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/*
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* Note: Check completed_fence first, as fenceptr is in a write-combine
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* mapping, so it will be more expensive to read.
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*/
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return (int32_t)(fctx->completed_fence - fence) >= 0 ||
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(int32_t)(*fctx->fenceptr - fence) >= 0;
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}
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/* called from workqueue */
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void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence)
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{
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spin_lock(&fctx->spinlock);
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fctx->completed_fence = max(fence, fctx->completed_fence);
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spin_unlock(&fctx->spinlock);
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}
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struct msm_fence {
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struct dma_fence base;
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struct msm_fence_context *fctx;
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};
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static inline struct msm_fence *to_msm_fence(struct dma_fence *fence)
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{
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return container_of(fence, struct msm_fence, base);
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}
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static const char *msm_fence_get_driver_name(struct dma_fence *fence)
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{
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return "msm";
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}
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static const char *msm_fence_get_timeline_name(struct dma_fence *fence)
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{
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struct msm_fence *f = to_msm_fence(fence);
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return f->fctx->name;
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}
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static bool msm_fence_signaled(struct dma_fence *fence)
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{
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struct msm_fence *f = to_msm_fence(fence);
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return fence_completed(f->fctx, f->base.seqno);
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}
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static const struct dma_fence_ops msm_fence_ops = {
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.get_driver_name = msm_fence_get_driver_name,
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.get_timeline_name = msm_fence_get_timeline_name,
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.signaled = msm_fence_signaled,
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};
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struct dma_fence *
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msm_fence_alloc(struct msm_fence_context *fctx)
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{
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struct msm_fence *f;
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f = kzalloc(sizeof(*f), GFP_KERNEL);
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if (!f)
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return ERR_PTR(-ENOMEM);
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f->fctx = fctx;
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dma_fence_init(&f->base, &msm_fence_ops, &fctx->spinlock,
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fctx->context, ++fctx->last_fence);
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return &f->base;
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}
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