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![Markus Pargmann](/assets/img/avatar_default.png)
This is the core driver for imx25 touchscreen/adc driver. The module has one shared ADC and two different conversion queues which use the ADC. The two queues are identical. Both can be used for general purpose ADC but one is meant to be used for touchscreens. This driver is the core which manages the central components and registers of the TSC/ADC unit. It manages the IRQs and forwards them to the correct components. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Denis Carikli <denis@eukrea.com> [ensure correct ADC clock depending on the IPG clock] Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Acked-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
203 lines
5.3 KiB
C
203 lines
5.3 KiB
C
/*
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* Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdesc.h>
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include <linux/mfd/imx25-tsadc.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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static struct regmap_config mx25_tsadc_regmap_config = {
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.fast_io = true,
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.max_register = 8,
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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};
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static void mx25_tsadc_irq_handler(struct irq_desc *desc)
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{
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struct mx25_tsadc *tsadc = irq_desc_get_handler_data(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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u32 status;
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chained_irq_enter(chip, desc);
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regmap_read(tsadc->regs, MX25_TSC_TGSR, &status);
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if (status & MX25_TGSR_GCQ_INT)
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generic_handle_irq(irq_find_mapping(tsadc->domain, 1));
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if (status & MX25_TGSR_TCQ_INT)
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generic_handle_irq(irq_find_mapping(tsadc->domain, 0));
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chained_irq_exit(chip, desc);
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}
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static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct mx25_tsadc *tsadc = d->host_data;
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irq_set_chip_data(irq, tsadc);
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irq_set_chip_and_handler(irq, &dummy_irq_chip,
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handle_level_irq);
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irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
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return 0;
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}
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static struct irq_domain_ops mx25_tsadc_domain_ops = {
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.map = mx25_tsadc_domain_map,
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.xlate = irq_domain_xlate_onecell,
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};
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static int mx25_tsadc_setup_irq(struct platform_device *pdev,
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struct mx25_tsadc *tsadc)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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int irq;
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irq = platform_get_irq(pdev, 0);
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if (irq <= 0) {
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dev_err(dev, "Failed to get irq\n");
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return irq;
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}
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tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,
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tsadc);
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if (!tsadc->domain) {
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dev_err(dev, "Failed to add irq domain\n");
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return -ENOMEM;
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}
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irq_set_chained_handler(irq, mx25_tsadc_irq_handler);
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irq_set_handler_data(irq, tsadc);
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return 0;
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}
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static void mx25_tsadc_setup_clk(struct platform_device *pdev,
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struct mx25_tsadc *tsadc)
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{
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unsigned clk_div;
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/*
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* According to the datasheet the ADC clock should never
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* exceed 1,75 MHz. Base clock is the IPG and the ADC unit uses
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* a funny clock divider. To keep the ADC conversion time constant
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* adapt the ADC internal clock divider to the IPG clock rate.
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*/
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dev_dbg(&pdev->dev, "Found master clock at %lu Hz\n",
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clk_get_rate(tsadc->clk));
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clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000);
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dev_dbg(&pdev->dev, "Setting up ADC clock divider to %u\n", clk_div);
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/* adc clock = IPG clock / (2 * div + 2) */
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clk_div -= 2;
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clk_div /= 2;
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/*
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* the ADC clock divider changes its behaviour when values below 4
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* are used: it is fixed to "/ 10" in this case
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*/
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clk_div = max_t(unsigned, 4, clk_div);
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dev_dbg(&pdev->dev, "Resulting ADC conversion clock at %lu Hz\n",
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clk_get_rate(tsadc->clk) / (2 * clk_div + 2));
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regmap_update_bits(tsadc->regs, MX25_TSC_TGCR,
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MX25_TGCR_ADCCLKCFG(0x1f),
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MX25_TGCR_ADCCLKCFG(clk_div));
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}
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static int mx25_tsadc_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct mx25_tsadc *tsadc;
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struct resource *res;
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int ret;
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void __iomem *iomem;
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tsadc = devm_kzalloc(dev, sizeof(*tsadc), GFP_KERNEL);
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if (!tsadc)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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iomem = devm_ioremap_resource(dev, res);
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if (IS_ERR(iomem))
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return PTR_ERR(iomem);
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tsadc->regs = devm_regmap_init_mmio(dev, iomem,
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&mx25_tsadc_regmap_config);
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if (IS_ERR(tsadc->regs)) {
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dev_err(dev, "Failed to initialize regmap\n");
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return PTR_ERR(tsadc->regs);
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}
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tsadc->clk = devm_clk_get(dev, "ipg");
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if (IS_ERR(tsadc->clk)) {
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dev_err(dev, "Failed to get ipg clock\n");
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return PTR_ERR(tsadc->clk);
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}
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/* setup clock according to the datasheet */
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mx25_tsadc_setup_clk(pdev, tsadc);
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/* Enable clock and reset the component */
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regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,
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MX25_TGCR_CLK_EN);
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regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,
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MX25_TGCR_TSC_RST);
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/* Setup powersaving mode, but enable internal reference voltage */
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regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,
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MX25_TGCR_POWERMODE_SAVE);
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regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,
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MX25_TGCR_INTREFEN);
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ret = mx25_tsadc_setup_irq(pdev, tsadc);
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if (ret)
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return ret;
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platform_set_drvdata(pdev, tsadc);
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of_platform_populate(np, NULL, NULL, dev);
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return 0;
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}
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static const struct of_device_id mx25_tsadc_ids[] = {
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{ .compatible = "fsl,imx25-tsadc" },
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{ /* Sentinel */ }
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};
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static struct platform_driver mx25_tsadc_driver = {
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.driver = {
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.name = "mx25-tsadc",
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.of_match_table = of_match_ptr(mx25_tsadc_ids),
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},
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.probe = mx25_tsadc_probe,
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};
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module_platform_driver(mx25_tsadc_driver);
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MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");
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MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:mx25-tsadc");
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