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105fc33520
In preparation for reworking the EL1 irq/nmi entry code, move the existing logic to C. We no longer need the asm_nmi_enter() and asm_nmi_exit() wrappers, so these are removed. The new C functions are marked noinstr, which prevents compiler instrumentation and runtime probing. In subsequent patches we'll want the new C helpers to be called in all cases, so we don't bother wrapping the calls with ifdeferry. Even when the new C functions are stubs the trivial calls are unlikely to have a measurable impact on the IRQ or NMI paths anyway. Prototypes are added to <asm/exception.h> as otherwise (in some configurations) GCC will complain about the lack of a forward declaration. We already do this for existing function, e.g. enter_from_user_mode(). The new helpers are marked as noinstr (which prevents all instrumentation, tracing, and kprobes). Otherwise, there should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: James Morse <james.morse@arm.com> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20201130115950.22492-7-mark.rutland@arm.com Signed-off-by: Will Deacon <will@kernel.org>
69 lines
1.7 KiB
C
69 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Based on arch/arm/kernel/irq.c
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*
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* Copyright (C) 1992 Linus Torvalds
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* Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
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* Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
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* Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
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* Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
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* Copyright (C) 2012 ARM Ltd.
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*/
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#include <linux/irq.h>
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#include <linux/memory.h>
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#include <linux/smp.h>
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#include <linux/hardirq.h>
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#include <linux/init.h>
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#include <linux/irqchip.h>
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#include <linux/kprobes.h>
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#include <linux/seq_file.h>
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#include <linux/vmalloc.h>
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#include <asm/daifflags.h>
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#include <asm/vmap_stack.h>
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/* Only access this in an NMI enter/exit */
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DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts);
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DEFINE_PER_CPU(unsigned long *, irq_stack_ptr);
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#ifdef CONFIG_VMAP_STACK
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static void init_irq_stacks(void)
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{
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int cpu;
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unsigned long *p;
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for_each_possible_cpu(cpu) {
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p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu));
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per_cpu(irq_stack_ptr, cpu) = p;
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}
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}
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#else
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/* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */
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DEFINE_PER_CPU_ALIGNED(unsigned long [IRQ_STACK_SIZE/sizeof(long)], irq_stack);
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static void init_irq_stacks(void)
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{
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int cpu;
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for_each_possible_cpu(cpu)
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per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu);
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}
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#endif
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void __init init_IRQ(void)
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{
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init_irq_stacks();
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irqchip_init();
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if (!handle_arch_irq)
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panic("No interrupt controller found.");
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if (system_uses_irq_prio_masking()) {
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/*
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* Now that we have a stack for our IRQ handler, set
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* the PMR/PSR pair to a consistent state.
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*/
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WARN_ON(read_sysreg(daif) & PSR_A_BIT);
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local_daif_restore(DAIF_PROCCTX_NOIRQ);
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}
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}
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