Conor Dooley fa52935abe riscv: dts: microchip: reduce the fic3 clock rate ... For the v2022.09 release of the reference design, the fic3 clock rate been reduced from 62.5 MHz to 50 MHz as it allows timing to be closed significantly more quickly by customers who chose to build the reference design themselves. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>		2022-09-27 18:53:58 +01:00
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dts	riscv: dts: microchip: reduce the fic3 clock rate	2022-09-27 18:53:58 +01:00
.gitignore	RISC-V: ignore xipImage	2022-05-24 17:52:37 -07:00
install.sh	kbuild: factor out the common installation code into scripts/install.sh	2022-05-11 21:45:53 +09:00
loader.lds.S	riscv: Move kernel mapping outside of linear mapping	2021-04-26 08:25:04 -07:00
loader.S	riscv: provide a flat image loader	2019-11-17 15:17:39 -08:00
Makefile	riscv: move the (z)install rules to arch/riscv/Makefile	2021-09-10 23:08:26 -07:00