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![Aneesh Kumar K.V](/assets/img/avatar_default.png)
To support memory keys, we moved the hash pte slot information to the
second half of the page table. This was ok with PTE entries at level
4 (PTE page) and level 3 (PMD). We already allocate larger page table
pages at those levels to accomodate extra details. For level 4 we
already have the extra space which was used to track 4k hash page
table entry details and at level 3 the extra space was allocated to
track the THP details.
With hugetlbfs PTE, we used this extra space at the PMD level to store
the slot details. But we also support hugetlbfs PTE at PUD level for
16GB pages and PUD level page didn't allocate extra space. This
resulted in memory corruption.
Fix this by allocating extra space at PUD level when HUGETLB is
enabled.
Fixes: bf9a95f9a6
("powerpc: Free up four 64K PTE bits in 64K backed HPTE pages")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Reviewed-by: Ram Pai <linuxram@us.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
510 lines
12 KiB
C
510 lines
12 KiB
C
/*
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* This file contains ioremap and related functions for 64-bit machines.
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*
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* Derived from arch/ppc64/mm/init.c
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Dave Engebretsen <engebret@us.ibm.com>
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* Rework for PPC64 port.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/stddef.h>
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#include <linux/vmalloc.h>
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#include <linux/memblock.h>
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#include <linux/slab.h>
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#include <linux/hugetlb.h>
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#include <asm/pgalloc.h>
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#include <asm/page.h>
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#include <asm/prom.h>
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#include <asm/io.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/mmu.h>
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#include <asm/smp.h>
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#include <asm/machdep.h>
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#include <asm/tlb.h>
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#include <asm/trace.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/sections.h>
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#include <asm/firmware.h>
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#include <asm/dma.h>
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#include <asm/powernv.h>
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#include "mmu_decl.h"
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#ifdef CONFIG_PPC_BOOK3S_64
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#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
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#error TASK_SIZE_USER64 exceeds user VSID range
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#endif
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#endif
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#ifdef CONFIG_PPC_BOOK3S_64
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/*
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* partition table and process table for ISA 3.0
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*/
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struct prtb_entry *process_tb;
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struct patb_entry *partition_tb;
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/*
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* page table size
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*/
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unsigned long __pte_index_size;
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EXPORT_SYMBOL(__pte_index_size);
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unsigned long __pmd_index_size;
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EXPORT_SYMBOL(__pmd_index_size);
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unsigned long __pud_index_size;
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EXPORT_SYMBOL(__pud_index_size);
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unsigned long __pgd_index_size;
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EXPORT_SYMBOL(__pgd_index_size);
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unsigned long __pmd_cache_index;
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EXPORT_SYMBOL(__pmd_cache_index);
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unsigned long __pud_cache_index;
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EXPORT_SYMBOL(__pud_cache_index);
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unsigned long __pte_table_size;
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EXPORT_SYMBOL(__pte_table_size);
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unsigned long __pmd_table_size;
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EXPORT_SYMBOL(__pmd_table_size);
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unsigned long __pud_table_size;
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EXPORT_SYMBOL(__pud_table_size);
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unsigned long __pgd_table_size;
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EXPORT_SYMBOL(__pgd_table_size);
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unsigned long __pmd_val_bits;
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EXPORT_SYMBOL(__pmd_val_bits);
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unsigned long __pud_val_bits;
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EXPORT_SYMBOL(__pud_val_bits);
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unsigned long __pgd_val_bits;
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EXPORT_SYMBOL(__pgd_val_bits);
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unsigned long __kernel_virt_start;
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EXPORT_SYMBOL(__kernel_virt_start);
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unsigned long __kernel_virt_size;
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EXPORT_SYMBOL(__kernel_virt_size);
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unsigned long __vmalloc_start;
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EXPORT_SYMBOL(__vmalloc_start);
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unsigned long __vmalloc_end;
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EXPORT_SYMBOL(__vmalloc_end);
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unsigned long __kernel_io_start;
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EXPORT_SYMBOL(__kernel_io_start);
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struct page *vmemmap;
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EXPORT_SYMBOL(vmemmap);
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unsigned long __pte_frag_nr;
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EXPORT_SYMBOL(__pte_frag_nr);
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unsigned long __pte_frag_size_shift;
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EXPORT_SYMBOL(__pte_frag_size_shift);
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unsigned long ioremap_bot;
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#else /* !CONFIG_PPC_BOOK3S_64 */
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unsigned long ioremap_bot = IOREMAP_BASE;
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#endif
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/**
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* __ioremap_at - Low level function to establish the page tables
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* for an IO mapping
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*/
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void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
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unsigned long flags)
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{
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unsigned long i;
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/* Make sure we have the base flags */
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if ((flags & _PAGE_PRESENT) == 0)
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flags |= pgprot_val(PAGE_KERNEL);
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/* We don't support the 4K PFN hack with ioremap */
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if (flags & H_PAGE_4K_PFN)
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return NULL;
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WARN_ON(pa & ~PAGE_MASK);
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WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
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WARN_ON(size & ~PAGE_MASK);
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for (i = 0; i < size; i += PAGE_SIZE)
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if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
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return NULL;
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return (void __iomem *)ea;
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}
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/**
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* __iounmap_from - Low level function to tear down the page tables
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* for an IO mapping. This is used for mappings that
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* are manipulated manually, like partial unmapping of
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* PCI IOs or ISA space.
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*/
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void __iounmap_at(void *ea, unsigned long size)
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{
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WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
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WARN_ON(size & ~PAGE_MASK);
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unmap_kernel_range((unsigned long)ea, size);
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}
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void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
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unsigned long flags, void *caller)
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{
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phys_addr_t paligned;
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void __iomem *ret;
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/*
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* Choose an address to map it to.
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* Once the imalloc system is running, we use it.
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* Before that, we map using addresses going
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* up from ioremap_bot. imalloc will use
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* the addresses from ioremap_bot through
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* IMALLOC_END
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*
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*/
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paligned = addr & PAGE_MASK;
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size = PAGE_ALIGN(addr + size) - paligned;
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if ((size == 0) || (paligned == 0))
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return NULL;
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if (slab_is_available()) {
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struct vm_struct *area;
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area = __get_vm_area_caller(size, VM_IOREMAP,
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ioremap_bot, IOREMAP_END,
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caller);
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if (area == NULL)
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return NULL;
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area->phys_addr = paligned;
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ret = __ioremap_at(paligned, area->addr, size, flags);
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if (!ret)
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vunmap(area->addr);
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} else {
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ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
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if (ret)
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ioremap_bot += size;
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}
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if (ret)
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ret += addr & ~PAGE_MASK;
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return ret;
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}
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void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
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unsigned long flags)
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{
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return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
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}
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void __iomem * ioremap(phys_addr_t addr, unsigned long size)
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{
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unsigned long flags = pgprot_val(pgprot_noncached(__pgprot(0)));
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void *caller = __builtin_return_address(0);
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if (ppc_md.ioremap)
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return ppc_md.ioremap(addr, size, flags, caller);
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return __ioremap_caller(addr, size, flags, caller);
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}
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void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
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{
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unsigned long flags = pgprot_val(pgprot_noncached_wc(__pgprot(0)));
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void *caller = __builtin_return_address(0);
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if (ppc_md.ioremap)
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return ppc_md.ioremap(addr, size, flags, caller);
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return __ioremap_caller(addr, size, flags, caller);
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}
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void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
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unsigned long flags)
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{
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void *caller = __builtin_return_address(0);
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/* writeable implies dirty for kernel addresses */
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if (flags & _PAGE_WRITE)
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flags |= _PAGE_DIRTY;
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/* we don't want to let _PAGE_EXEC leak out */
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flags &= ~_PAGE_EXEC;
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/*
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* Force kernel mapping.
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*/
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flags &= ~_PAGE_USER;
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flags |= _PAGE_PRIVILEGED;
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if (ppc_md.ioremap)
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return ppc_md.ioremap(addr, size, flags, caller);
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return __ioremap_caller(addr, size, flags, caller);
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}
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/*
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* Unmap an IO region and remove it from imalloc'd list.
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* Access to IO memory should be serialized by driver.
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*/
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void __iounmap(volatile void __iomem *token)
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{
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void *addr;
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if (!slab_is_available())
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return;
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addr = (void *) ((unsigned long __force)
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PCI_FIX_ADDR(token) & PAGE_MASK);
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if ((unsigned long)addr < ioremap_bot) {
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printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
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" at 0x%p\n", addr);
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return;
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}
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vunmap(addr);
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}
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void iounmap(volatile void __iomem *token)
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{
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if (ppc_md.iounmap)
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ppc_md.iounmap(token);
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else
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__iounmap(token);
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}
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EXPORT_SYMBOL(ioremap);
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EXPORT_SYMBOL(ioremap_wc);
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EXPORT_SYMBOL(ioremap_prot);
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EXPORT_SYMBOL(__ioremap);
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EXPORT_SYMBOL(__ioremap_at);
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EXPORT_SYMBOL(iounmap);
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EXPORT_SYMBOL(__iounmap);
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EXPORT_SYMBOL(__iounmap_at);
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#ifndef __PAGETABLE_PUD_FOLDED
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/* 4 level page table */
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struct page *pgd_page(pgd_t pgd)
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{
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if (pgd_huge(pgd))
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return pte_page(pgd_pte(pgd));
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return virt_to_page(pgd_page_vaddr(pgd));
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}
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#endif
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struct page *pud_page(pud_t pud)
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{
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if (pud_huge(pud))
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return pte_page(pud_pte(pud));
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return virt_to_page(pud_page_vaddr(pud));
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}
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/*
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* For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
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* For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
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*/
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struct page *pmd_page(pmd_t pmd)
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{
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if (pmd_trans_huge(pmd) || pmd_huge(pmd) || pmd_devmap(pmd))
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return pte_page(pmd_pte(pmd));
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return virt_to_page(pmd_page_vaddr(pmd));
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}
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#ifdef CONFIG_PPC_64K_PAGES
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static pte_t *get_from_cache(struct mm_struct *mm)
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{
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void *pte_frag, *ret;
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spin_lock(&mm->page_table_lock);
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ret = mm->context.pte_frag;
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if (ret) {
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pte_frag = ret + PTE_FRAG_SIZE;
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/*
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* If we have taken up all the fragments mark PTE page NULL
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*/
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if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
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pte_frag = NULL;
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mm->context.pte_frag = pte_frag;
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}
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spin_unlock(&mm->page_table_lock);
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return (pte_t *)ret;
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}
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static pte_t *__alloc_for_cache(struct mm_struct *mm, int kernel)
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{
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void *ret = NULL;
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struct page *page;
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if (!kernel) {
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page = alloc_page(PGALLOC_GFP | __GFP_ACCOUNT);
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if (!page)
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return NULL;
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if (!pgtable_page_ctor(page)) {
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__free_page(page);
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return NULL;
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}
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} else {
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page = alloc_page(PGALLOC_GFP);
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if (!page)
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return NULL;
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}
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ret = page_address(page);
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spin_lock(&mm->page_table_lock);
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/*
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* If we find pgtable_page set, we return
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* the allocated page with single fragement
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* count.
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*/
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if (likely(!mm->context.pte_frag)) {
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set_page_count(page, PTE_FRAG_NR);
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mm->context.pte_frag = ret + PTE_FRAG_SIZE;
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}
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spin_unlock(&mm->page_table_lock);
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return (pte_t *)ret;
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}
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pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
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{
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pte_t *pte;
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pte = get_from_cache(mm);
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if (pte)
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return pte;
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return __alloc_for_cache(mm, kernel);
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}
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#endif /* CONFIG_PPC_64K_PAGES */
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void pte_fragment_free(unsigned long *table, int kernel)
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{
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struct page *page = virt_to_page(table);
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if (put_page_testzero(page)) {
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if (!kernel)
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pgtable_page_dtor(page);
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free_unref_page(page);
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}
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}
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#ifdef CONFIG_SMP
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void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
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{
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unsigned long pgf = (unsigned long)table;
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BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
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pgf |= shift;
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tlb_remove_table(tlb, (void *)pgf);
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}
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void __tlb_remove_table(void *_table)
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{
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void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
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unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
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if (!shift)
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/* PTE page needs special handling */
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pte_fragment_free(table, 0);
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else {
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BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
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kmem_cache_free(PGT_CACHE(shift), table);
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}
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}
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#else
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void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
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{
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if (!shift) {
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/* PTE page needs special handling */
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pte_fragment_free(table, 0);
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} else {
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BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
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kmem_cache_free(PGT_CACHE(shift), table);
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}
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}
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#endif
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#ifdef CONFIG_PPC_BOOK3S_64
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void __init mmu_partition_table_init(void)
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{
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unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;
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unsigned long ptcr;
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BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 36), "Partition table size too large.");
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partition_tb = __va(memblock_alloc_base(patb_size, patb_size,
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MEMBLOCK_ALLOC_ANYWHERE));
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/* Initialize the Partition Table with no entries */
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memset((void *)partition_tb, 0, patb_size);
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/*
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* update partition table control register,
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* 64 K size.
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*/
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ptcr = __pa(partition_tb) | (PATB_SIZE_SHIFT - 12);
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mtspr(SPRN_PTCR, ptcr);
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powernv_set_nmmu_ptcr(ptcr);
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}
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void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
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unsigned long dw1)
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{
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unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
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partition_tb[lpid].patb0 = cpu_to_be64(dw0);
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partition_tb[lpid].patb1 = cpu_to_be64(dw1);
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/*
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* Global flush of TLBs and partition table caches for this lpid.
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* The type of flush (hash or radix) depends on what the previous
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* use of this partition ID was, not the new use.
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*/
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asm volatile("ptesync" : : : "memory");
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if (old & PATB_HR) {
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asm volatile(PPC_TLBIE_5(%0,%1,2,0,1) : :
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"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
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asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
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"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
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trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 1);
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} else {
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asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
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"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
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trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 0);
|
|
}
|
|
asm volatile("eieio; tlbsync; ptesync" : : : "memory");
|
|
}
|
|
EXPORT_SYMBOL_GPL(mmu_partition_table_set_entry);
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
|
|
|
#ifdef CONFIG_STRICT_KERNEL_RWX
|
|
void mark_rodata_ro(void)
|
|
{
|
|
if (!mmu_has_feature(MMU_FTR_KERNEL_RO)) {
|
|
pr_warn("Warning: Unable to mark rodata read only on this CPU.\n");
|
|
return;
|
|
}
|
|
|
|
if (radix_enabled())
|
|
radix__mark_rodata_ro();
|
|
else
|
|
hash__mark_rodata_ro();
|
|
}
|
|
|
|
void mark_initmem_nx(void)
|
|
{
|
|
if (radix_enabled())
|
|
radix__mark_initmem_nx();
|
|
else
|
|
hash__mark_initmem_nx();
|
|
}
|
|
#endif
|