mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 05:48:40 +00:00
fdf130155f
Add display clock properties for the HiHope RZ/G2N board. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-5-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
41 lines
833 B
Text
41 lines
833 B
Text
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Device Tree Source for the HiHope RZ/G2N main board
|
|
*
|
|
* Copyright (C) 2019 Renesas Electronics Corp.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "r8a774b1.dtsi"
|
|
#include "hihope-common.dtsi"
|
|
|
|
/ {
|
|
model = "HopeRun HiHope RZ/G2N main board based on r8a774b1";
|
|
compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
|
|
|
|
memory@48000000 {
|
|
device_type = "memory";
|
|
/* first 128MB is reserved for secure area. */
|
|
reg = <0x0 0x48000000 0x0 0x78000000>;
|
|
};
|
|
|
|
memory@480000000 {
|
|
device_type = "memory";
|
|
reg = <0x4 0x80000000 0x0 0x80000000>;
|
|
};
|
|
};
|
|
|
|
&du {
|
|
clocks = <&cpg CPG_MOD 724>,
|
|
<&cpg CPG_MOD 723>,
|
|
<&cpg CPG_MOD 721>,
|
|
<&versaclock5 1>,
|
|
<&x302_clk>,
|
|
<&versaclock5 2>;
|
|
clock-names = "du.0", "du.1", "du.3",
|
|
"dclkin.0", "dclkin.1", "dclkin.3";
|
|
};
|
|
|
|
&sdhi3 {
|
|
mmc-hs400-1_8v;
|
|
};
|